Abstract:
A display has an array of pixels each of which has a light-emitting diode (30) such as an organic light-emitting diode. A drive transistor (TD) and an emission transistor (TE) are coupled in series with the light-emitting diode (30) of each pixel (22) between a positive power supply (VDDEL) and a ground power supply (VSSEL). The pixels (22) include first and second switching transistors (T1, T2). A data storage capacitor (Cst1) is coupled between a gate and source of the drive transistor (TD) in each pixel. Signal lines (Data) may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors (T1, T2), emission transistors (TE), and drive transistors (TD) may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.
Abstract:
A display may have an array of pixels arranged in rows and columns. Display driver circuitry may load data into the pixels via data lines that extend along the columns. The display driver circuitry may include gate driver circuitry that supplies horizontal control signals to rows of the pixels. The horizontal control signals may include emission enable signals for controlling emission enable transistors and scan signals for controlling switching transistors. During an emission phase of operation for the display, the emission enable signal may be pulse-width modulated by the emission control gate driver circuits in the gate driver circuitry to control the output of the light-emitting diodes. The emission control gate driver circuits may be controlled using an emission start signal and a pair of two-phase clocks.
Abstract:
An organic light-emitting diode display may have an array of pixel circuits. Each pixel circuit may contain an organic light-emitting diode that emits light, a drive transistor that controls current flow through the diode, and additional transistors such as switching transistors for loading data into the pixel circuit and emission transistors for enabling and disabling current flow through the drive transistor and diode. Gate driver circuitry may produce emission control signals that control the emission transistors. Display driver circuitry may generate a start signal with a digitally controlled pulse width. The start signal may be applied to shift register circuitry in the gate driver circuitry. The pulse width of the start signal may be adjusted to adjust the luminance of the display.
Abstract:
An electronic device may be provided with a display. The display may be formed from an array of organic light-emitting diode display pixels (22-1, 22-2). Each display pixel may have an organic light-emitting diode having an anode (50) and a cathode (60) and may have an associated pixel circuit (70) for controlling the light-emitting diode. The anodes may be formed from patches of metal arranged in an array on the display. The display pixels may be controlled using data lines and gate lines. The gate lines may control thin-film transistors in the pixel circuits. Gate driver circuitry (18) along the left and right edges of the display may supply signals to the gate lines. The pixel circuits may be located in the center of the display between the gate driver circuitry. Some of the anodes (50 of pixel 22-2) may overlap the pixel circuits and some of the anodes (50 of pixels 22-1) may overlap the gate driver circuitry (18).
Abstract:
A display has an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor (TD) and an emission transistor (TE) are coupled in series with the light-emitting diode of each pixel between a positive power supply (VDDEL) and a ground power supply (VSSEL). The pixels (22) include first and second switching transistors (TS1, TS2). A data storage capacitor (Cst1) is coupled between a gate and source of the drive transistor (TD) in each pixel. Signal lines (Data) may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors (TS1, TS2), emission transistor (TE2), and drive transistors (TD) include semiconducting-oxide transistors and silicon transistors.
Abstract:
A display has an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor (TD) and an emission transistor (TE) are coupled in series with the light-emitting diode of each pixel between a positive power supply (VDDEL) and a ground power supply (VSSEL). The pixels (22) include first and second switching transistors (TS1, TS2). A data storage capacitor (Cst1) is coupled between a gate and source of the drive transistor (TD) in each pixel. Signal lines (Data) may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors (TS1, TS2), emission transistor (TE2), and drive transistors (TD) include semiconducting-oxide transistors and silicon transistors.
Abstract:
A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
Abstract:
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver circuit may include multiple gate line driver segments each of which is activated by a separate gate start pulse. Each gate start pulse may only be released at the end of an IFP interval. In another suitable arrangement, dummy gate driver units may be interposed among active gate driver units. Gate output signals may propagate through the dummy gate driver units during the IFP internal. In another suitable arrangement, each active gate driver unit may be provided with a buffer portion that protects at least some transistor in the gate driver unit from undesired stress.
Abstract:
A display has an array of pixels each of which has a light-emitting diode (30) such as an organic light-emitting diode. A drive transistor (TD) and an emission transistor (TE) are coupled in series with the light-emitting diode (30) of each pixel (22) between a positive power supply (VDDEL) and a ground power supply (VSSEL). The pixels (22) include first and second switching transistors (T1, T2). A data storage capacitor (Cst1) is coupled between a gate and source of the drive transistor (TD) in each pixel. Signal lines (Data) may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors (T1, T2), emission transistors (TE), and drive transistors (TD) may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.