公开(公告)号：WO2015031037A1

公开(公告)日：2015-03-05

申请号：PCT/US2014/050571

申请日：2014-08-11

Applicant: APPLE INC.

Inventor： CHANG, Shih, Chang ,  HUNG, Ming-Chin ,  YU, Cheng-Ho ,  CHANG, Ting-Kuo ,  JAMSHIDI ROUDBARI, Abbas ,  LIN, Shang-Chih ,  KIM, Kyung-wook ,  HUANG, Chun-Yao ,  LEE, Szu-Hsien ,  CHEN, Yu-Cheng ,  OSAWA, Hiroshi ,  PARK, Young, Bae ,  GUPTA, Vasudha ,  LIN, Chin-wei ,  CHOI, Jae, Won ,  TSAI, Tsung-ting

IPC: G02F1/1368 ,  H01L27/32 ,  G09F9/00 ,  H01L29/786

CPC classification number: H01L27/1225 ,  G02F1/13452 ,  G02F1/13454 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  G02F2202/104 ,  H01L27/1222 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/3262 ,  H01L27/3272 ,  H01L29/7869

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract translation: 电子设备可以包括在基板上具有显示像素阵列的显示器。 显示像素可以是液晶显示器中的有机发光二极管显示像素或显示像素。 在有机发光二极管显示器中，可以形成包括半导体氧化物薄膜晶体管，硅薄膜晶体管和电容器结构的混合薄膜晶体管结构。 电容器结构可以与半导体氧化物薄膜晶体管重叠。 有机发光二极管显示像素可以具有氧化物和硅晶体管的组合。 在液晶显示器中，显示驱动器电路可以包括硅薄膜晶体管电路，显示像素可以基于氧化物薄膜晶体管。 可以在形成硅晶体管栅极和氧化物晶体管栅极中使用单层或两层不同的栅极金属层。 硅晶体管可以具有与浮动栅极结构重叠的栅极。

公开(公告)号：WO2021194689A2

公开(公告)日：2021-09-30

申请号：PCT/US2021/019986

申请日：2021-02-26

Applicant: APPLE INC.

Inventor： ONO, Shinya ,  LIN, Chin-Wei ,  MATSUDAIRA, Akira ,  CHANG, Jiun-Jye ,  HUANG, Jung, Yen ,  CHANG, Pei-En ,  KITSOMBOONLOHA, Rungrot ,  LEE, Szu-Hsien

IPC: H01L27/32 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0202 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2330/02 ,  G09G3/3225 ,  G09G3/3233 ,  G09G3/3266 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3279 ,  H01L29/4908 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/7869

Abstract: An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.

公开(公告)号：WO2013188193A1

公开(公告)日：2013-12-19

申请号：PCT/US2013/044379

申请日：2013-06-05

Applicant: APPLE INC.

Inventor： HUANG, Chun-Yao ,  KIM, Kyung-Wook ,  CHANG, Shih Chang ,  LEE, Szu-Hsien ,  PARK, Young Bae

IPC: G09G3/36 ,  G02F1/1362

CPC classification number: G09G3/3648 ,  G02F1/136227 ,  G02F1/136286 ,  G09G2300/0426

Abstract: An electronic display for providing a visual or video output for an electronic device. The electronic device includes a transistor layer configured to activate a first pixel row and a second pixel row. For each pixel in the first pixel row and the second pixel row, the transistor layer includes a switch transistor, a pixel electrode, and a common electrode. The electronic device further includes a pixel controller for selectively activating each pixel. The pixel controller includes a first gate line, a first drive line, and a second drive line. During operation, the first gate line provides a charge to the pixel electrode for a first pixel in the first pixel row and for a second pixel in the second pixel row, and the first drive line activates the switch transistor for the first pixel, and the second drive line activates the switch transistor for the second pixel.

Abstract translation: 一种用于为电子设备提供视觉或视频输出的电子显示器。 电子设备包括被配置为激活第一像素行和第二像素行的晶体管层。 对于第一像素行和第二像素行中的每个像素，晶体管层包括开关晶体管，像素电极和公共电极。 电子设备还包括用于选择性地激活每个像素的像素控制器。 像素控制器包括第一栅极线，第一驱动线和第二驱动线。 在操作期间，第一栅极线为第一像素行中的第一像素和第二像素行中的第二像素向像素电极提供电荷，并且第一驱动线激活用于第一像素的开关晶体管，并且 第二驱动线激活用于第二像素的开关晶体管。

公开(公告)号：WO2016022265A1

公开(公告)日：2016-02-11

申请号：PCT/US2015/040632

申请日：2015-07-15

Applicant: APPLE INC.

Inventor： WANG, Chaohao ,  LEE, Szu-Hsien ,  SACCHETTO, Paolo ,  CHANG, Shih Chang ,  HUANG, Chun-Yao ,  DRZAIC, Paul, S.

IPC: G09G3/20 ,  G09G3/36

CPC classification number: G09G3/3611 ,  G09G3/32 ,  G09G2310/04 ,  G09G2320/0247 ,  G09G2320/103 ,  G09G2340/0435

Abstract: This application relates to methods and apparatus for refreshing a display device at various frequencies. Specifically, multiple areas of the display device can be refreshed concurrently at different frequencies. In this way, when static content is being displayed in certain areas of the display device, those certain areas can be refreshed at a lower rate than areas displaying dynamic content such as video or animation. By refreshing at lower rates, the energy consumed by the display device and subsystems associated with the display device can be reduced. Additionally, processes for reducing flicker when refreshing the display device at different refresh rates are disclosed herein.

Abstract translation: 本申请涉及用于以各种频率刷新显示设备的方法和装置。 具体而言，显示装置的多个区域可以以不同的频率同时刷新。 以这种方式，当显示设备的某些区域中显示静态内容时，可以以比显示动态内容（例如视频或动画）的区域更低的速率刷新那些特定区域。 通过以较低的速率刷新，可以减少与显示装置相关联的显示装置和子系统消耗的能量。 另外，本文公开了在以不同刷新率刷新显示设备时减少闪烁的处理。

公开(公告)号：WO2015119741A1

公开(公告)日：2015-08-13

申请号：PCT/US2015/010751

申请日：2015-01-09

Applicant: APPLE INC.

Inventor： LIN, Chin-Wei ,  HUANG, Chun-Yao ,  CHANG, Shih, Chang ,  LEE, Szu-Hsien

IPC: G06F3/041

CPC classification number: G06F3/0412 ,  G06F3/0416

Abstract: A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver circuit may include multiple gate line driver segments each of which is activated by a separate gate start pulse. Each gate start pulse may only be released at the end of an IFP interval. In another suitable arrangement, dummy gate driver units may be interposed among active gate driver units. Gate output signals may propagate through the dummy gate driver units during the IFP internal. In another suitable arrangement, each active gate driver unit may be provided with a buffer portion that protects at least some transistor in the gate driver unit from undesired stress.

Abstract translation: 触摸屏显示器可以包括耦合到显示像素阵列的栅极线驱动器电路。 显示器可以具有帧内暂停（IFP）能力，其中可以在一个或多个帧内消隐间隔期间执行触摸或其它操作。 在一种合适的布置中，栅极驱动电路可以包括多个栅极线驱动器段，每个栅驱动器段由单独的栅极起始脉冲激活。 每个栅极起始脉冲只能在IFP间隔结束时释放。 在另一种合适的布置中，虚拟栅极驱动器单元可插入有源栅极驱动器单元中。 栅极输出信号可能在IFP内部传播通过虚拟栅极驱动器单元。 在另一种合适的布置中，每个有源栅极驱动器单元可以设置有缓冲部分，其保护栅极驱动器单元中的至少一些晶体管免受不期望的应力。

公开(公告)号：WO2017035428A1

公开(公告)日：2017-03-02

申请号：PCT/US2016/048867

申请日：2016-08-26

Applicant: APPLE INC.

Inventor： TANG, Howard H. ,  SACCHETTO, Paolo ,  WANG, Chaohao ,  LEE, Szu-Hsien ,  BENNETT, Patrick ,  ZHENG, Fenghua

IPC: G09G3/36

CPC classification number: G09G3/2096 ,  G09G3/3655 ,  G09G3/3666 ,  G09G2300/0426 ,  G09G2310/0291 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0257 ,  G09G2320/0266

Abstract: The disclosure relates to systems and methods for reducing VCOM settling periods. A number of pixels is sub-divided into a plurality of regions. The pixels are configured to transmit light. A common voltage (VCOM) driving circuit is configured to drive a common electrode of the pixels. Moreover, each of a number of VCOM driving circuits includes a variable resistor configured to be driven to a resistance level based at least in part on which region of the plurality of regions includes an active pixel within the region. Furthermore, a resistance level is set and based at least in part on where the active pixel is located.

Abstract translation: 本公开涉及用于减少VCOM建立周期的系统和方法。 多个像素被细分为多个区域。 像素被配置为透射光。 公共电压（VCOM）驱动电路被配置为驱动像素的公共电极。 此外，多个VCOM驱动电路中的每一个包括被配置为至少部分地基于该区域中的有源像素的多个区域的哪个区域被驱动到电阻电平的可变电阻器。 此外，设置电阻水平并且至少部分地基于活动像素位于何处。

公开(公告)号：WO2016053722A1

公开(公告)日：2016-04-07

申请号：PCT/US2015/051795

申请日：2015-09-23

Applicant: APPLE INC.

Inventor： CHIU, Hao-lin ,  YANG, Byung Duk ,  HUANG, Chun-yao ,  KIM, Kyung Wook ,  CHANG, Shih Chang ,  LEE, Szu-Hsien

IPC: G09F9/30 ,  G02F1/1345

CPC classification number: G09G3/3648 ,  G02F1/13338 ,  G02F1/134309 ,  G02F1/1345 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13456 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04104 ,  G06F2203/04112 ,  G09F9/30 ,  G09G3/3666 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/0281 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/124 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract translation: 显示器可以具有排列成行和列的像素阵列。 每个像素可以具有用于控制与该像素相关联的输出光量的晶体管。 晶体管可以是具有有源区的薄膜晶体管，第一和第二源极 - 漏极端子和栅极。 栅极线可用于将栅极控制信号分配到每行中的晶体管的栅极。 垂直于栅极线延伸的数据线可用于沿像素列分布图像数据。 栅极线可以连接到平行于数据线延伸的栅极线扩展。 数据线可以各自重叠相应的一个栅极线延伸。 通孔可用于将栅极线延伸部分连接到栅极线。 门线扩展可能都具有相同的长度。

公开(公告)号：EP4094292A2

公开(公告)日：2022-11-30

申请号：EP21713310.7

申请日：2021-02-26

Applicant: Apple Inc.

Inventor： ONO, Shinya ,  LIN, Chin-Wei ,  MATSUDAIRA, Akira ,  CHANG, Jiun-Jye ,  HUANG, Jung, Yen ,  CHANG, Pei-En ,  KITSOMBOONLOHA, Rungrot ,  LEE, Szu-Hsien

IPC: H01L27/32

公开(公告)号：EP3102999B1

公开(公告)日：2020-04-15

申请号：EP15701870.6

申请日：2015-01-09

Applicant: Apple Inc.

Inventor： LIN, Chin-Wei ,  HUANG, Chun-Yao ,  CHANG, Shih, Chang ,  LEE, Szu-Hsien

IPC: G06F3/041

公开(公告)号：EP3201903A1

公开(公告)日：2017-08-09

申请号：EP15778817.5

申请日：2015-09-23

Applicant: Apple Inc.

Inventor： CHIU, Hao-lin ,  YANG, Byung Duk ,  HUANG,Chun-yao ,  KIM, Kyung Wook ,  CHANG, Shih Chang ,  LEE, Szu-Hsien

IPC: G09F9/30 ,  G02F1/1345

CPC classification number: G09G3/3648 ,  G02F1/13338 ,  G02F1/134309 ,  G02F1/1345 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13456 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04104 ,  G06F2203/04112 ,  G09F9/30 ,  G09G3/3666 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/0281 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/124 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract translation: 显示器可以具有按行和列排列的像素阵列。 每个像素可以具有用于控制与该像素相关联的输出光量的晶体管。 晶体管可以是具有有源区的薄膜晶体管，第一和第二源极 - 漏极端子以及栅极。 可以使用栅极线来将栅极控制信号分配到每一行中的晶体管的栅极。 垂直于栅极线延伸的数据线可以用于沿着像素列分布图像数据。 栅极线可以连接到平行于数据线延伸的栅极线延伸。 数据线可以分别与栅极线延伸中的相应一个重叠。 过孔可用于将栅极线延伸部连接到栅极线。 栅极线延长线可以全部具有相同的长度。