公开(公告)号：US11851755B2

公开(公告)日：2023-12-26

申请号：US16952363

申请日：2020-11-19

Applicant: ASM IP Holding B.V.

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Krzysztof Kamil Kachel ,  David Kurt de Roest ,  Bert Jongbloed ,  Dieter Pierreux

IPC: C23C16/04 ,  C23C16/455 ,  C23C16/44 ,  H01L21/033 ,  C23C16/448 ,  C23C16/26 ,  C23C16/52 ,  C23C16/56

CPC classification number: C23C16/45523 ,  C23C16/04 ,  C23C16/042 ,  C23C16/045 ,  C23C16/26 ,  C23C16/448 ,  C23C16/4412 ,  C23C16/4485 ,  C23C16/45527 ,  C23C16/52 ,  C23C16/56 ,  H01L21/0332 ,  H01L21/0337

Abstract: A sequential infiltration synthesis apparatus comprising:



a reaction chamber constructed and arranged to hold at least a first substrate;
a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and,
a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by:
activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber;
activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and,
activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber. The program in the memory is programmed with the first period T1 longer than the second period T2.

公开(公告)号：US20230335397A1

公开(公告)日：2023-10-19

申请号：US18208398

申请日：2023-06-12

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/50 ,  H01L21/762

CPC classification number: H01L21/0228 ,  C23C16/045 ,  C23C16/45527 ,  C23C16/45536 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02219 ,  C23C16/45525 ,  C23C16/50 ,  H01L21/02274 ,  H01L21/76224

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

公开(公告)号：US20230220588A1

公开(公告)日：2023-07-13

申请号：US18153254

申请日：2023-01-11

Applicant: ASM IP Holding B.V.

Inventor： Steven Van Aerde ,  Wilco Verweij ,  Dieter Pierreux ,  Kelly Houben ,  Bert Jongbloed ,  Peter Westrom

IPC: C30B29/68 ,  H01L21/677 ,  H01L21/02 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52

CPC classification number: C30B29/68 ,  H01L21/67742 ,  H01L21/02532 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/0262 ,  C30B25/165 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/02433

Abstract: A method of forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing a semiconductor processing apparatus. This semiconductor processing apparatus comprises a process chamber and a carousel for stationing a wafer boat before or after processing in the process chamber. The method further comprises loading the wafer boat into the process chamber, the wafer boat comprising the plurality of substrates. The method further comprises processing the plurality of substrates in the process chamber, thereby forming, on the plurality of substrates, the epitaxial stack. This epitaxial stack has a pre-determined thickness. The processing comprises unloading the wafer boat, one or more times, from the process chamber to the carousel until the epitaxial stack reaches the pre-determined thickness.

公开(公告)号：US11088002B2

公开(公告)日：2021-08-10

申请号：US15940759

申请日：2018-03-29

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed ,  Cornelis Thaddeus Herbschleb ,  Hessel Sprey

IPC: H01L21/673 ,  H01L21/306 ,  H01L21/67 ,  C23C16/48 ,  H01L21/02

Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.

公开(公告)号：US11056353B2

公开(公告)日：2021-07-06

申请号：US15994236

申请日：2018-05-31

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed

IPC: H01L21/3213 ,  C23F1/16 ,  H01L21/306 ,  H01L21/02 ,  H01L21/311 ,  H01L21/308

Abstract: The disclosure relates generally to the field of processing substrates, for example comprising materials such as quartz, glass or silicon. The disclosure more particular relates to providing wet etch protection layers comprising boron and carbon and etching the substrate in a hydrogen fluoride aqueous solution. One or more of the boron and carbon containing films can have a thickness of at least 5, preferably 10 and, more preferably 30 nm. The method comprises wet etching the substrate in a hydrofluoric acid solution with a hydrogen fluoride concentration of at least 10 wt. % for at least 5 minutes.

公开(公告)号：US20190295837A1

公开(公告)日：2019-09-26

申请号：US16317774

申请日：2017-07-14

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido Van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/04 ,  H01L21/762 ,  C23C16/50

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

公开(公告)号：US10343907B2

公开(公告)日：2019-07-09

申请号：US14660789

申请日：2015-03-17

Applicant: ASM IP Holding B.V.

Inventor： Bert Jongbloed ,  Dieter Pierreux ,  Cornelius A. van der Jeugd ,  Lucian Jdira ,  Radko G. Bankras ,  Theodorus G. M. Oosterlaken

IPC: H01L21/02 ,  C01B15/017 ,  H01L21/67

Abstract: In some embodiments, a system is disclosed for delivering hydrogen peroxide to a semiconductor processing chamber. The system includes a process canister for holding a H2O2/H2O mixture in a liquid state, an evaporator provided with an evaporator heater, a first feed line for feeding the liquid H2O2/H2O mixture to the evaporator, and a second feed line for feeding the evaporated H2O2/H2O mixture to the processing chamber, the second feed line provided with a second feed line heater. The evaporator heater is configured to heat the evaporator to a temperature lower than 120° C. and the second feed line heater is configured to heat the feed line to a temperature equal to or higher than the temperature of the evaporator.

公开(公告)号：US10199223B2

公开(公告)日：2019-02-05

申请号：US15413848

申请日：2017-01-24

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed

IPC: H01L21/033

Abstract: An etch stop layer comprises a metal oxide comprising a metal selected from the group consisting of metals of Group 4 of the periodic table, metals of Group 5 of the periodic table, metals of Group 6 of the periodic table, and yttrium. The metal oxide forms exceptionally thin layers that are resistant to ashing and HF exposure. Subjecting the etch stop layer to both ashing and HF etch processes removes less than 0.3 nm of the thickness of the etch stop layer, and more preferably less than 0.25 nm. The etch stop layer may be thin and may have a thickness of about 0.5-2 nm. In some embodiments, the etch stop layer comprises tantalum oxide (TaO).

公开(公告)号：US09991139B2

公开(公告)日：2018-06-05

申请号：US14648380

申请日：2013-12-03

Applicant: ASM IP HOLDING B.V.

Inventor： Theodorus G. M. Oosterlaken ,  Chris G. M. de Ridder ,  Bert Jongbloed

IPC: H01L21/677 ,  H01L21/67 ,  B23P6/00 ,  F27B1/20 ,  H01L21/673 ,  H01L21/687

CPC classification number: H01L21/67098 ,  B23P6/00 ,  F27B1/20 ,  H01L21/6719 ,  H01L21/67303 ,  H01L21/6735 ,  H01L21/67724 ,  H01L21/67775 ,  H01L21/68707

Abstract: A vertical furnace processing system for processing semiconductor substrates, comprising the following modules: —a processing module including a vertical furnace; an I/O-station module including at least one load port to which a substrate cassette is dockable; a wafer handling module configured to transfer semiconductor substrates between the processing module and a substrate cassette docked to the load port of the I/O-station module; and a gas supply module including at least one gas supply or gas supply connection for providing the vertical furnace of the processing module with process gas, wherein at least two of the said modules are mutually decouplably coupled, such that said at least two modules are decouplable from one another to facilitate servicing of the system, and in particular the vertical furnace thereof.

公开(公告)号：US20180033606A1

公开(公告)日：2018-02-01

申请号：US15222715

申请日：2016-07-28

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido Van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/50 ,  H01L21/762 ,  C23C16/455

CPC classification number: H01L21/0228 ,  C23C16/45525 ,  C23C16/50 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/76224

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.