公开(公告)号：SG11201407475QA

公开(公告)日：2014-12-30

申请号：SG11201407475Q

申请日：2012-11-22

Applicant: IBM

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F11/07

Abstract: When an abort of a transaction occurs, a determination is made as to whether diagnostic information is to be stored in one or more transaction diagnostic blocks (TDBs). There are different types of transaction diagnostic blocks to accept diagnostic information depending on the type of abort and other considerations. As examples, there are a program-specified TDB in which information is stored if a valid TDB address is provided in a transaction begin instruction; a program interruption TDB, which is stored into when the program is aborted due to an interruption; and a program interception TDB, which is stored into when an abort results in an interception.

公开(公告)号：AU2013233830A1

公开(公告)日：2014-09-11

申请号：AU2013233830

申请日：2013-03-01

Applicant: IBM

Inventor： FARRELL MARK S ,  GAINEY JR CHARLES W ,  MITRAN MARCEL ,  SHUM CHUNG-LUNG KEVIN ,  SLEGEL TIMOTHY J ,  SMITH BRIAN LEONARD ,  STOODLEY KEVIN A

IPC: G06F11/34

Abstract: Embodiments of the invention relate to enabling and disabling execution of a run-time instrumentation facility. An instruction for execution by the processor in a lesser privileged state is fetched by the processor. It is determined, by the processor, that the run-time instrumentation facility permits execution of the instruction in the lesser-privileged state and that controls associated with the run-time instrumentation facility are valid. The run-time instrumentation facility is disabled based on the instruction being a run-time instrumentation facility off (RIOFF) instruction. The disabling includes updating a bit in a program status word (PSW) of the processor to indicate that run-time instrumentation data should not be captured by the processor. The run-time instrumentation facility is enabled based on the instruction being a run-time instrumentation facility on (RION) instruction. The enabling includes updating the bit in the PSW to indicate that run-time instrumentation data should be captured by the processor.

公开(公告)号：MX2014007915A

公开(公告)日：2014-07-30

申请号：MX2014007915

申请日：2012-11-13

Applicant: IBM

Inventor： COPELAND REID ,  SLEGEL TIMOTHY ,  MITRAN MARCEL ,  CARLOUGH STEVEN ,  SCHWARZ ERIC MARK ,  GAINEY CHARLES JR

IPC: G06F9/30

Abstract: Se proveen instrucciones de máquina, referidas en la presente como instrucción de convertir de zonificado larga (CDZT) e instrucción de convertir de zonificado extendida (CXZT), que leen datos de EBCDIC o ASCII de memoria, convertirlos al formato de punto flotante decimal apropiado y escribirlos a un registro de punto flotante objetivo o par de registros de punto flotante objetivos. Además, se proveen instrucciones de máquina, referidas en la presente como instrucción de convertir a zonificado larga (CZDT) e instrucción de convertir a zonificado extendida (CZXT), que convierten un operando de punto flotante decimal (DFP) en un registro de punto flotante fuente o par de registros de punto flotante fuentes a datos de EBCDIC o ASCII y almacenarlos a un sitio de memoria objetivo.

公开(公告)号：MX2014007914A

公开(公告)日：2014-07-30

申请号：MX2014007914

申请日：2012-11-13

Applicant: IBM

Inventor： COPELAND REID ,  SLEGEL TIMOTHY ,  MITRAN MARCEL ,  CARLOUGH STEVEN ,  SCHWARZ ERIC MARK ,  GAINEY CHARLES JR

IPC: G06F9/30

Abstract: Se describen instrucciones de máquina, referidas en la presente como instrucción de convertir de zona larga (CDZT) e instrucción de convertir de zona extendida (CXZT) que lee datos de EBCDIC o ASCII de memoria, los convierten al formato de punto flotante decimal apropiado y lo describen a un registrador de punto flotante objetivo o par de registradores de punto flotante objetivo. Además, instrucciones de máquina, referidas en la presente como instrucción de convertir a zona larga (CZDT) e instrucción de convertir a zona extendida (CZXT) son provista, que convierten un operando de punto flotante decimal (DFP) en un registrador de punto flotante fuente o par de registradores de punto flotante fuente a datos de EBCDIC o ASCII y los guardan a un sitio de memoria objetivo.

公开(公告)号：ZA201209644B

公开(公告)日：2013-08-28

申请号：ZA201209644

申请日：2012-12-19

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F20060101

Abstract: A computer employs a set of General Purpose Registers (GPRs). Each GPR comprises a plurality of portions. Programs such as an Operating System and Applications operating in a Large GPR mode, access the full GPR, however programs such as Applications operating in Small GPR mode, only have access to a portion at a time. Instruction Opcodes, in Small GPR mode, may determine which portion is accessed.

公开(公告)号：SG186102A1

公开(公告)日：2013-01-30

申请号：SG2012087854

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  MITRAN MARCEL ,  SLEGEL TIMOTHY

Abstract: An arithmetic/logical instruction is executed having interlocked memory operands, when executed obtains a second operand from a location in memory, and saves a temporary copy of the second operand, the execution performs an arithmetic or logical operation based on the second operand and a third operand and stores the result in the memory location of the second operand, and subsequently stores the temporary copy in a first register.

公开(公告)号：MX2012014533A

公开(公告)日：2013-01-29

申请号：MX2012014533

申请日：2010-11-08

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  MITRAN MARCEL

IPC: G06F9/30 ,  G06F9/318

Abstract: Una computadora emplea un conjunto de Registros de Uso General (GPRs). Cada GPR comprende una pluralidad de porciones. Los programas, como un Sistema Operativo y las Aplicaciones que funcionan en un modo de GPR grande, obtienen acceso a todo el GPR, sin embargo, programas como Aplicaciones que funcionan en el modo de GPR pequeño, sólo tienen acceso a una porción a la vez. Los Códigos de operación de instrucción, en el modo de GPR pequeño, pueden determinar a qué porción se obtiene acceso.

公开(公告)号：CA2719661A1

公开(公告)日：2011-01-18

申请号：CA2719661

申请日：2010-11-05

Applicant: IBM CANADA

Inventor： PATIL KISHOR V ,  KIELSTRA ALLAN H ,  LOW ANDREW R ,  MITRAN MARCEL ,  ROLLESTON GAVIN F ,  SHAM IVAN

IPC: G06F9/44 ,  G06F9/40 ,  G06F9/45

Abstract: An illustrative embodiment of a computer-implemented process for an enhanced function-descriptor-based dispatch in a multi-linkage environment receives user code containing a function compiled in a supplementary linkage convention of a caller to form an invoked function and determines whether the supplementary linkage convention of the caller for the invoked function matches a supplementary linkage implementation provided by a library. Responsive to a determination that the supplementary linkage convention of the caller for the invoked function matches a supplementary linkage implementation provided by the library, select the supplementary linkage implementation provided by the library and dispatch the invoked function in the selected supplementary linkage implementation provided by the library.

公开(公告)号：ZA201905099B

公开(公告)日：2022-04-28

申请号：ZA201905099

申请日：2019-07-31

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  PAPROTSKI VOLODYMYR ,  MITRAN MARCEL

Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

公开(公告)号：SI3571580T1

公开(公告)日：2021-11-30

申请号：SI201830425

申请日：2018-01-03

Applicant: IBM

Inventor： GREINER DAN ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN ,  SAPORITO ANTHONY ,  PAPROTSKI VOLODYMYR ,  MITRAN MARCEL

IPC: G06F9/00