公开(公告)号：US10547839B2

公开(公告)日：2020-01-28

申请号：US15651620

申请日：2017-07-17

Applicant: Intel Corporation

Inventor： Fangwen Fu ,  Srinivasan Embar Raghukrishnan ,  Atthar H. Mohammed

IPC: H04N19/147 ,  H04N19/124 ,  H04N19/52 ,  H04N19/176 ,  G06F17/11 ,  H04N19/103

Abstract: Systems, apparatus and methods are described including operations for video coding rate control including Rate Distortion Optimized Quantization on a block-by-block basis.

公开(公告)号：US10313681B2

公开(公告)日：2019-06-04

申请号：US14133078

申请日：2013-12-18

Applicant: INTEL CORPORATION

Inventor： Heon-Mo Koo ,  Atthar H. Mohammed ,  Thuan H. Pham

IPC: H04N19/147 ,  H04N19/176 ,  H04N19/13 ,  H04N19/124 ,  H04N19/42

Abstract: Various embodiments are generally directed to techniques for reducing processing and/or storage resource requirements for RDO in compressing motion video. A device to compress motion video includes a first cost calculator to derive a first bitcost value of using a quantized coefficient of a quantized coefficient block of a frame of a video in compressing the video, the first bitcost value based on a context model of a context-adaptive binary arithmetic coder (CABAC); and a second cost calculator to derive a second bitcost value of replacing the quantized coefficient with an alternate value derived from the quantized coefficient in compressing the video, the second bitcost value based on the context model. Other embodiments are described and claimed.

公开(公告)号：US20180302556A1

公开(公告)日：2018-10-18

申请号：US15488878

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Stanley J. Baran ,  Abhishek R. Appu ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray ,  Barnan Das ,  Archie Sharma ,  Richmond Hicks ,  Changliang Wang ,  Satyanarayana Avadhanam ,  Robert J. Johnston ,  Narayan Biswal

IPC: H04N5/232 ,  G03B17/56 ,  G03B37/04 ,  H04N13/02 ,  H04N5/225 ,  G06F3/01 ,  G02B27/01

Abstract: Systems and methods may provide for capturing 360 degree video, and multi-resolution encoding, processing and displaying of the video based on a field of view (FOV) and region of interest (ROI) for a viewer. The ROI may be determined based on eye tracking information (ETI) and the video may be encoded for viewports within the FOV at a high resolution and for other viewports outside the FOV at a lower resolution. ROI in the video may be encoded at a high resolution and areas outside of the ROI may be encoded at a lower resolution. The ETI enables the selective display of one or more warnings based on the gaze of a user to improve the efficiency of the warning. 3D glasses having variable lens may be used to adjust the focal distance of a virtual display to match a virtual distance of an object based on stereo distance cues.

公开(公告)号：US20180295282A1

公开(公告)日：2018-10-11

申请号：US15483787

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Jill M. Boyce ,  Stanley J. Baran ,  Sumit Mohan ,  Yi-Jen Chiu ,  Jason Tanner ,  Atthar H. Mohammed ,  Richmond Hicks ,  Barnan Das

IPC: H04N5/232 ,  H04N5/247

Abstract: Systems, apparatuses and methods may determine, on a per camera basis, an interest level with respect to panoramic video content, identify a subset of cameras in a plurality of cameras for which the interest level is below a threshold, and reduce power consumption in the subset of cameras. Additionally, technology may determine a projection format associated with panoramic video content, identify one or more discontinuous boundaries in the projection format, and modify an encoding scheme associated with the panoramic video content based on the discontinuous boundaries. Moreover, an encoded frame may be assigned to a temporal scalability layer that has a higher priority than a layer to which an asynchronous space warp frame is assigned. Additionally, technology may reduce the encoding complexity of a boundary between an active region and an inactive region in fisheye content.

公开(公告)号：US12170778B2

公开(公告)日：2024-12-17

申请号：US17677400

申请日：2022-02-22

Applicant: Intel Corporation

Inventor： Atthar H. Mohammed ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray ,  Narayan Biswal ,  Richmond Hicks ,  Arthur J. Runyan ,  Nausheen Ansari

IPC: H04N19/142 ,  H04N5/14 ,  H04N19/174 ,  H04N19/87 ,  H04N19/895 ,  H04N21/4402 ,  H04N21/442

Abstract: Systems, apparatuses and methods may include a source device that generates a scene change notification in response to a movement of a camera, modifies an encoding scheme associated with the video content captured by the camera in response to the scene change notification, identifies a full-frame difference threshold, wherein scene analysis information includes frame difference data, and compares the frame difference data to an intermediate threshold that is less than the full-frame difference threshold, wherein the scene change notification is generated when the frame difference data exceeds the intermediate threshold. A sink device may obtain transport quality data associated with video content, modify an output parameter of a display based on the transport quality data, determine a view perspective of a still image containing a plurality of image slices, retrieve only a subset of the plurality of image slices based on the view perspective and decode the retrieved subset.

公开(公告)号：US20230401130A1

公开(公告)日：2023-12-14

申请号：US17840211

申请日：2022-06-14

Applicant: Intel Corporation

Inventor： Rakesh Mehta ,  Hanmanthrao Patli ,  Ivan Herrera Mejia ,  Raj Chandar Rasappan ,  Hagay Spector ,  Renu Patle ,  Fylur Rahman Sathakathulla ,  Ruchira Liyanage ,  Raju Kasturi ,  Fred Steinberg ,  Ananth Gopalakrishnan ,  Satish Venkatesan ,  Pradyumna Reddy Patnam ,  Suresh Pothukuchi ,  Tapan Ganpule ,  Atthar H. Mohammed ,  Altug Koker

IPC: G06F11/22 ,  G06F11/07

CPC classification number: G06F11/2236 ,  G06F11/0721 ,  G06F11/079

Abstract: One embodiment provides an apparatus comprising a circuit board; an active interposer coupled with the circuit board via a debug package, and a graphics processor die coupled with the active interposer via the debug package. The graphics processor die includes graphics processor resources configured to execute instructions for a multi-die system on chip (SoC) device and excludes functionality that is implemented in a separate due of the multi-die SoC. The apparatus includes a field-programmable gate array (FPGA) including hardware logic that is configurable to emulate functionality provided by the separate die of the multi-die SoC device, which enables silicon validation of the graphics processor die separately from other dies of the multi-die SoC.

公开(公告)号：US11729416B2

公开(公告)日：2023-08-15

申请号：US16651641

申请日：2017-12-29

Applicant: INTEL CORPORATION

Inventor： Srinivasan Embar Raghukrishnan ,  James M. Holland ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Dmitry E. Ryzhov ,  Jason Tanner ,  Lidong Xu ,  Wenhao Zhang

IPC: H04N19/577 ,  H04N19/513 ,  H04N19/567 ,  H04N19/96

CPC classification number: H04N19/577 ,  H04N19/521 ,  H04N19/567 ,  H04N19/96

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine a residual error based on coding unit information, and determine a candidate coding unit and an associated rate distortion cost based on the residual error. An embodiment may additionally or alternatively include technology to partition a first coding unit into two or more smaller coding units based on a partition message, accelerate processing of at least one of the two or more smaller coding units, and estimate motion fora frame based at least partially on results of the accelerated processing. Other embodiments are disclosed and claimed.

公开(公告)号：US11551389B2

公开(公告)日：2023-01-10

申请号：US16839583

申请日：2020-04-03

Applicant: Intel Corporation

Inventor： Stanley J. Baran ,  Abhishek R. Appu ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray ,  Kunjal Parikh ,  Changliang Wang ,  Srikanth Kambhatla ,  Gary Smith ,  Satyanarayana Avadhanam ,  Richmond Hicks ,  Robert J. Johnston ,  Narayan Biswal ,  Susanta Bhattacharjee

IPC: H04N9/77 ,  G06T5/00 ,  G06T11/60

Abstract: Systems, apparatuses and methods may a performance-enhanced computing system comprising a sensor for measuring luminance values corresponding to light focused onto the sensor at a plurality of pixel locations, a memory including a set of instructions, and a processor. The processor executes a set of instructions causing the system to generate a multi-segment tone mapping curve, generate a set of tone mapping values corresponding to the multi-segment tone mapping curve for equally spaced input values between zero and one for storage into a look up table, and process the luminance values using the look up table to apply the tone mapping curve to the luminance values of the pixels.

公开(公告)号：US11218633B2

公开(公告)日：2022-01-04

申请号：US16808626

申请日：2020-03-04

Applicant: Intel Corporation

Inventor： Jill M. Boyce ,  Stanley J. Baran ,  Sumit Mohan ,  Yi-Jen Chiu ,  Jason Tanner ,  Atthar H. Mohammed ,  Richmond Hicks ,  Barnan Das

IPC: H04N21/6587 ,  H04N21/4728 ,  H04N19/167 ,  H04N5/232 ,  H04N5/247 ,  H04N7/18 ,  H04N21/84 ,  H04N21/218 ,  H04N21/81 ,  H04L29/06 ,  H04N7/01 ,  H04N19/119 ,  H04N19/56 ,  H04N19/103 ,  H04N19/124 ,  H04N19/31 ,  H04N5/917 ,  G08B13/196 ,  G08B29/18

Abstract: Systems, apparatuses and methods may determine, on a per camera basis, an interest level with respect to panoramic video content, identify a subset of cameras in a plurality of cameras for which the interest level is below a threshold, and reduce power consumption in the subset of cameras. Additionally, technology may determine a projection format associated with panoramic video content, identify one or more discontinuous boundaries in the projection format, and modify an encoding scheme associated with the panoramic video content based on the discontinuous boundaries. Moreover, an encoded frame may be assigned to a temporal scalability layer that has a higher priority than a layer to which an asynchronous space warp frame is assigned. Additionally, technology may reduce the encoding complexity of a boundary between an active region and an inactive region in fisheye content.

公开(公告)号：US20210349527A1

公开(公告)日：2021-11-11

申请号：US17161014

申请日：2021-01-28

Applicant: Intel Corporation

Inventor： Robert J. Johnston ,  Satyanarayana Avadhanam ,  Changliang Wang ,  Narayan Biswal ,  Archie Sharma ,  Richmond Hicks ,  Joydeep Ray ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai Chan ,  Sumit Mohan ,  Jill M. Boyce ,  Yi-Jen Chiu

IPC: G06F3/01 ,  G06T15/10

Abstract: Systems, apparatuses and methods may provide for technology to improve user experience when viewing simulated 3D objects on a display. Head and upper-body movements may be tracked and recognized as gestures to alter the displayed viewing angle. The technology provides for a very natural way to look around, under, or over objects.