Abstract:
A receiver (350) compatible with both wide channel constant envelope 4 level FSK FM modulation and narrow channel .pi./4 differential QPSK linear modulation allows compatible interaction between modified constant envelope and non-constant envelope transmitters (300). All Nyquist filtering occurs in the transmitters (300), and none in the receiver (350).
Abstract:
A quad 16 QAM transmission and reception methodology wherein a time domain pilot reference is advantageously associated therewith. There may be one or more such pilot references for each packet of multiple 16 QAM pulses. Depending upon the embodiment, each 16 QAM pulse can include a time domain pilot reference, or an estimated pilot reference for that pulse can be determined either by reference to pilot references in other pulses sharing the same packet, or by reference to pilot references for other previously received 16 QAM pulses corresponding to that same pulse.
Abstract:
A digital Zero-IF Selectivity Section (DZISS) (20, 20'). The DZISS of the present invention teaches a topology that facilitates realization in both transmitter (20') and receivers (20). In the preferred low-speed embodiment, the digital filters (32, 32', 33, 33') are comprised of cascaded filter sections (64a-64d) employing decimation (66) to reduce the data rate. In the preferred high-speed embodiment, the digital filters (32, 32', 33, 33') are more sophisticated as at least the first filter section (64') is decomposed to enable high-speed operation. Decimation (66) is also employed on the high-speed embodiment to allow subsequent circuitry to operate at a lower data rate thus consuming less power. In an alternate embodiment, applicable to the low-speed and high-speed preferred embodiments, sections of the digital low pass filters (100A, 100B) are time multiplexed (104) effectuating a cost and space savings.
Abstract:
DIGITAL ZERO-IF SELECTIVITY SECTION A Digital Zero-IF Selectivity Section (DZISS) is disclosed. The DZISS of the present invention teaches a topology that facilitates realization in both transmitters and receivers. In the preferred low-speed embodiment, the digital filter are comprised of cascaded filter sections employing decimation co reduce the data rate. In the preferred high-speed embodiment, the digital filters are more sophisticated as at least the first filter section is decomposed to enable high-speed operation. Decimation is also employed on the high-speed embodiment to allow subsequent circuitry to operate at a lower data rate thus consuming less power. In an alternate embodiment, applicable to the low-speed and high-speed preferred embodiments, sections of the digital lowpass filters are time multiplexed effectuating a cost and space savings.
Abstract:
A digital receiver (100) for GPS C/A-code signals is described. The GPS receiver (100) of the present invention provides reception and tracking a plurality of satellites simultaneously, using four separate receiver channels. The GPS receiver (100) of the present invention includes an analog front-end (104) for selecting and frequency translating the received GPS signal. The GPS receiver (100) further includes a highspeed digital signal processor (110) for recovering the despread data of the GPS signal. The baseband signal is further processed by a genertal purpose digital signal processor (112) for signal search, tracking, and data recovery operations, and a microprocessor (114) provides overall receiver control, and interface with the operator of the GPS receiver (100).
Abstract:
A digital Zero-IF Selectivity Section (DZISS) (20, 20'). The DZISS of the present invention teaches a topology that facilitates realization in both transmitter (20') and receivers (20). In the preferred low-speed embodiment, the digital filters (32, 32', 33, 33') are comprised of cascaded filter sections (64a-64d) employing decimation (66) to reduce the data rate. In the preferred high-speed embodiment, the digital filters (32, 32', 33, 33') are more sophisticated as at least the first filter section (64') is decomposed to enable high-speed operation. Decimation (66) is also employed on the high-speed embodiment to allow subsequent circuitry to operate at a lower data rate thus consuming less power. In an alternate embodiment, applicable to the low-speed and high-speed preferred embodiments, sections of the digital low pass filters (100A, 100B) are time multiplexed (104) effectuating a cost and space savings.
Abstract:
A receiver (300) configured for: a) receiving (410) a first OFDM symbol and generating a plurality of demodulated symbols (306) for the first OFDM symbol: b) generating (420) decoder output code symbols (326) corresponding to a subset of the plurality of demodulated symbols; c) determining (430) that a set of (he decoder output code symbols (326) make up a set of reference symbols corresponding to at least a portion of the subset of the plurality of demodulated symbols (306); d) generating (440) the set of reference symbols; e) generating (450) a set of channel estimates (362) based on the set of reference symbols and the at least a portion of the subset of the plurality of demodulated symbols, for use in decoding a current OFDM symbol; and f) repeating steps b- e until a channel estimate for each demodulated symbol corresponding to the first OFDM symbol has been generated.
Abstract:
A system that includes a receiver (100) that is configured for: selecting (210) a set of demodulator output samples and a corresponding set of reference symbols; generating (220) a set of raw channel estimates based on the set of demodulator output samples and the corresponding set of reference symbols; subdividing (230) the set of raw channel estimates into a plurality of subsets; assigning and applying (240) a corresponding reference symbol magnitude quantization scheme to each subset; determining (250) a set of filter coefficients that is based on the quantization schemes applied to the subsets of raw channel estimates; and combining (260) the set of raw channel estimates with the set of filter coefficients to generate a channel estimate.
Abstract:
A receiver configured for: a) receiving (410) a first OFDM symbol and generating a plurality of demodulated symbols for the first OFDM symbol; b) generating (420) decoder output code symbols corresponding to a subset of the plurality of demodulated symbols; c) determining (430) that a set of the decoder output code symbols make up a set of reference symbols corresponding to at least a portion of the subset of the plurality of demodulated symbols; d) generating (440) the set of reference symbols; e) generating (450) a set of channel estimates based on the set of reference symbols and the at least a portion of the subset of the plurality of demodulated symbols, for use in decoding a current OFDM symbol; and f) repeating steps b-e until a channel estimate for each demodulated symbol corresponding to the first OFDM symbol has been generated.
Abstract:
A system that includes a receiver (100) that is configured for: selecting (210) a set of demodulator output samples and a corresponding set of reference symbols; generating (220) a set of raw channel estimates based on the set of demodulator output samples and the corresponding set of reference symbols; subdividing (230) the set of raw channel estimates into a plurality of subsets; assigning and applying (240) a corresponding reference symbol magnitude quantization scheme to each subset; determining (250) a set of filter coefficients that is based on the quantization schemes applied to the subsets of raw channel estimates; and combining (260) the set of raw channel estimates with the set of filter coefficients to generate a channel estimate.