公开(公告)号：SG11202111094YA

公开(公告)日：2021-11-29

申请号：SG11202111094Y

申请日：2020-04-16

Applicant: PANASONIC IP CORP AMERICA

Inventor： TOMA TADAMASA ,  NISHI TAKAHIRO ,  ABE KIYOFUMI ,  KATO YUSUKE

IPC: H04N19/159 ,  H04N19/12 ,  H04N19/176

Abstract: An encoder (100) includes: circuitry (160); and memory (162) coupled to the circuitry (160). In operation, the circuitry (160): derives a prediction error of the image by subtracting, from the image, a prediction image generated using intra prediction or inter prediction; performs primary transform on the prediction error, and performs secondary transform on a result of the primary transform; performs quantization on a result of the secondary transform; and encodes a result of the quantization as data of the image. In the performing of the secondary transform, when a matrix weighted intra prediction included in the intra prediction and having prediction modes is used, the circuitry (160) uses, as a transform set for the secondary transform, a common transform set shared among the prediction modes. The matrix weighted intra prediction generates the prediction image by performing matrix calculation on a pixel sequence obtained from pixel values of surrounding pixels of a current block, and the transform set for the secondary transform is applied to primary transform coefficients obtained from the result of the primary transform.

公开(公告)号：MX2021004194A

公开(公告)日：2021-05-27

申请号：MX2021004194

申请日：2019-12-06

Applicant: PANASONIC IP CORP AMERICA

Inventor： KATO YUSUKE ,  TOMA TADAMASA ,  NISHI TAKAHIRO ,  ABE KIYOFUMI

IPC: H04N19/70

Abstract: Un codificador (100) incluye la circuitería (160) y la memoria (162) acoplada a la circuitería (160), en la cual, en operación, la circuitería (160): divide una imagen actual para codificarla en dos o más mosaicos; codifica la imagen actual realizando la codificación sobre una base de rebanada, siendo la rebanada de forma rectangular y constituida por uno o más mosaicos o una parte de un mosaico obtenido por la división; y en la codificación de la imagen actual, excluye, de la información de encabezado, la información sobre una región ocupada por una rebanada ubicada en la esquina inferior derecha de la imagen actual.

公开(公告)号：CA3153767A1

公开(公告)日：2021-04-01

申请号：CA3153767

申请日：2020-07-03

Applicant: PANASONIC IP CORP AMERICA

Inventor： KATO YUSUKE ,  ABE KIYOFUMI ,  TOMA TADAMASA ,  NISHI TAKAHIRO

IPC: H04N19/13 ,  H04N19/157 ,  H04N19/18

Abstract: An encoding device (100) is provided with a circuit and a memory connected to the circuit, wherein the circuit, in operation, limits the number of times of processing of context adaptive encoding and encodes blocks of an image. In encoding of each of the blocks, in a case where the number of times of processing is in a limitation range of the number of times of processing, a coefficient information flag indicating an attribute of a coefficient included in the block is encoded. In encoding of the block, in a case where orthogonal transform is not applied to the block, when the coefficient information flag is encoded, transform processing is performed for transforming a coefficient value by using a value determined by using a peripheral coefficient that is a coefficient at the periphery of the position of a coefficient in the block, and the coefficient value after the transform processing is encoded by using the coefficient information flag encoded by the context adaptive encoding, whereas when the coefficient information flag is not encoded, the transform processing is not performed and the coefficient value is encoded by Golomb-Rice encoding.