Chip substrate
    31.
    发明授权

    公开(公告)号:US10014446B2

    公开(公告)日:2018-07-03

    申请号:US15363261

    申请日:2016-11-29

    Abstract: A chip substrate includes conductive layers, an insulation layer configured to electrically isolate the conductive layers, and a cavity composed of a groove formed at a predetermined depth in a region including the insulation layer. One side of the cavity includes a first surface and a second surface continuously extending from the first surface, the first surface is formed to vertically extend from a lower portion of the cavity and the second surface is formed so as to have the same slope as the other side of the cavity, whereby the distance between one side of the lower portion of the cavity and the insulation layer is increased.

    Chip Substrate Provided with Joining Grooves in Lens Insert
    34.
    发明申请
    Chip Substrate Provided with Joining Grooves in Lens Insert 审中-公开
    芯片基板在镜头插入件中提供连接槽

    公开(公告)号:US20160197245A1

    公开(公告)日:2016-07-07

    申请号:US14985275

    申请日:2015-12-30

    CPC classification number: H01L33/486 H01L33/58 H01L33/644 H01L2224/48137

    Abstract: A chip substrate includes: a plurality of conductive layers horizontally stacked and constituting the chip substrate; a plurality of insulation layers alternately with the conductive layers and electrically separating the conductive layers; a lens insert comprising a groove having a predetermined number of edges on the upper surface of the chip substrate and having a cross-section wherein an arc is formed at the region where the extended edges meet; a cavity comprising a groove reaching down to a predetermined depth towards the area accommodating the insulation layer within the internal region of the lens insert; and a plurality of joining grooves formed on the surface of the lens insert. Thus, the lens to be inserted also can be formed to be a shape comprising straight lines so that the manufacturing process of the lens to be inserted into the chip substrate can be further simplified.

    Abstract translation: 芯片基板包括:水平堆叠并构成芯片基板的多个导电层; 多个绝缘层与导电层交替并且电分离导电层; 透镜插入件,其包括在所述芯片基板的上表面上具有预定数量的边缘的凹槽,并且具有在所述延伸边缘相交的区域处形成弧的横截面; 空腔,其包括在所述透镜插入件的内部区域内朝向容纳所述绝缘层的区域到达预定深度的凹槽; 以及形成在透镜插入件的表面上的多个接合槽。 因此,插入的透镜也可以形成为包括直线的形状,使得可以进一步简化要插入到芯片基板的透镜的制造工艺。

    Method for manufacturing a can package-type optical device, and optical device manufactured thereby
    35.
    发明授权
    Method for manufacturing a can package-type optical device, and optical device manufactured thereby 有权
    罐式包装型光学元件的制造方法以及由此制造的光学元件

    公开(公告)号:US09281452B2

    公开(公告)日:2016-03-08

    申请号:US14349226

    申请日:2012-10-04

    Abstract: The present invention relates to a method for manufacturing an optical device, and to an optical device manufactured thereby, which involve using a substrate itself as a heat-dissipating plate, and adopting a substrate with vertical insulation layers formed thereon, such that electrode terminals do not have to be extruded out from a sealed space, and thus enabling the overall structure and manufacturing process for an optical device to be simplified.According to the present invention, a method for manufacturing a can package-type optical device comprises the steps of: (a) preparing a metal plate and a metal substrate with vertical insulation layers, wherein more than one vertical insulation layer crossing the substrate from the top surface to the bottom surface thereof are formed; (b) bonding the metal plate on the top surface of the metal substrate with vertical insulation layers; (c) forming a cavity on an intermediate product that has undergone step (b) in a form of a cylindrical pit having a predetermined depth reaching the surface of said metal substrate with vertical insulation layers by passing through said metal plate and the adhesive layers formed by said bonding, wherein said cavity contains said vertical insulation layer in the bottom wall thereof; (e) connecting a wire, which electrically connects an optical device and an electrode of the optical device together, to either side of the surface of the bottom wall of the vertical insulation layers of the cavity, respectively; and (g) sealing the cavity by means of a protective plate made from a light-transmitting material; and a can cap, formed as a picture frame whose top central portion and the bottom are open and encompassing the perimeter of the protective plate.

    Abstract translation: 本发明涉及一种光学器件的制造方法及其制造的光学器件,其涉及使用基板本身作为散热板,并且采用其上形成有垂直绝缘层的基板,使得电极端子 不必从密封空间挤出,从而能够简化光学装置的整体结构和制造过程。 根据本发明,一种罐封装型光学器件的制造方法包括以下步骤:(a)制备具有垂直绝缘层的金属板和金属基板,其中多于一个的垂直绝缘层与 形成其底面的顶面; (b)用垂直绝缘层将金属板与金属基板的顶面接合; (c)在具有预定深度的圆柱形凹坑形式的步骤(b)中形成空腔,该预定深度通过穿过所述金属板并形成的粘合剂层到达所述金属基板的具有垂直绝缘层的表面 通过所述接合,其中所述空腔在其底壁中包含所述垂直绝缘层; (e)将将光学装置和光学装置的电极电连接在一起的导线分别连接到腔的垂直绝缘层的底壁的表面的任一侧; 和(g)通过由透光材料制成的保护板密封空腔; 以及罐盖,其形成为其顶部中心部分和底部打开并且包围保护板的周边的相框。

    OPTICAL DEVICE AND METHOD FOR MANUFACTURING SAME
    36.
    发明申请
    OPTICAL DEVICE AND METHOD FOR MANUFACTURING SAME 有权
    光学装置及其制造方法

    公开(公告)号:US20150372209A1

    公开(公告)日:2015-12-24

    申请号:US14765457

    申请日:2014-02-06

    CPC classification number: H01L33/62 H01L33/54 H01L2224/48091 H01L2924/00014

    Abstract: An optical device includes a metal substrate wherein at least one vertical insulation layer is formed from the upper to the lower surface; a metal plated layer formed on the upper surface of the metal substrate except for the vertical insulation layer; and an optical device chip bonded to one portion of the metal plated layer. One electrode of the optical device chip is electrically connected to a bonded surface of the metal plated layer, and the other electrode of the optical device chip is wire bonded to the other portion of metal plated layer. The optical device chip and a peripheral region thereof is shielded with a sealant, and at least one groove is formed on a partial surface of the metal plated layer so that a portion of the sealant is directly bonded to the metal substrate.

    Abstract translation: 光学装置包括金属基板,其中至少一个垂直绝缘层从上表面到下表面形成; 形成在所述金属基板的除了所述垂直绝缘层之外的上表面上的金属镀层; 以及与金属镀层的一部分接合的光学器件芯片。 光器件芯片的一个电极与金属镀层的接合表面电连接,并且光学器件芯片的另一个电极被引线接合到金属镀层的另一部分。 光学元件芯片及其外围区域用密封剂屏蔽,并且在金属镀层的部分表面上形成至少一个凹槽,使得密封剂的一部分直接接合到金属基底。

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