公开(公告)号：DE60140433D1

公开(公告)日：2009-12-24

申请号：DE60140433

申请日：2001-03-02

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED ,  SIMIC EMILIJA ,  WILBORN THOMAS ,  ZHANG HAITAO ,  FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  LIN JIAN

IPC: H04B1/00 ,  H04B1/04 ,  H03G3/20 ,  H03G3/30 ,  H04B7/005 ,  H04B7/24

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：ES2320781T3

公开(公告)日：2009-05-28

申请号：ES05107468

申请日：2001-08-07

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED

IPC: H04B7/26 ,  H04J13/00

Abstract: Un procedimiento para determinar la temporización relativa de una señal piloto con respecto a una señal de temporización de referencia, estando la señal piloto generada por una estación base y transmitida a través de una antena de transmisión, comprendiendo el procedimiento: a) recibir la señal piloto generada por la estación base en un receptor de señal piloto con una antena, conociéndose el retardo de transmisión entre la antena del receptor y la antena de transmisión de la estación base; b) almacenar la señal piloto recibida; c) calibrar el retardo desde la antena del receptor hasta el convertidor digitalizador; d) activar la recepción y almacenamiento de la señal piloto con una señal basada en una relación de temporización conocida con la señal de referencia de temporización; y e) procesar los datos almacenados para determinar la temporización relativa entre la señal recibida y la señal de referencia de temporización.

公开(公告)号：AU2001243384B2

公开(公告)日：2006-09-14

申请号：AU2001243384

申请日：2001-03-02

Applicant: QUALCOMM INC

Inventor： LIN JIAN ,  WILBORN THOMAS ,  SIMIC EMILIJA ,  FILIPOVIC DANIEL ,  ZHANG HAITAO ,  YOUNIS SAED ,  KAUFMAN RALPH

IPC: H03G3/30 ,  H04B1/04 ,  H03G3/20 ,  H04B7/005 ,  H04B7/24

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：BR0108969A

公开(公告)日：2006-05-09

申请号：BR0108969

申请日：2001-03-02

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED ,  SIMIC EMILIJA ,  WILBORN THOMAS ,  ZHANG HAITAO ,  FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  LIN JIAN

IPC: H04B1/04 ,  H03G3/20 ,  H03G3/30 ,  H04B7/005 ,  H04B7/24

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：HK1060404A1

公开(公告)日：2004-08-06

申请号：HK04103282

申请日：2004-05-11

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED ,  SIMIC EMILIJA ,  WILBORN THOMAS ,  ZHANG HAITAO ,  FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  LIN JIAN

IPC: H03G20060101 ,  H03G3/20 ,  H04B1/04 ,  H03G3/30 ,  H04B7/005 ,  H04B7/24

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：CA2429340A1

公开(公告)日：2002-08-01

申请号：CA2429340

申请日：2001-11-14

Applicant: QUALCOMM INC

Inventor： ROWITCH DOUGLAS N ,  RICK ROLAND ,  AMERGA MESSAY ,  PATRICK CHRISTOPHER ,  YOUNIS SAED

IPC: G01S1/00 ,  G01S19/25 ,  H04B7/26 ,  H04W64/00 ,  G01S5/02 ,  G01S5/14 ,  H04Q7/38

Abstract: Techniques to detect whether or not a remote terminal is under the coverage of a repeater within a wireless communication network, which may be based on (1 ) a list of base stations expected to be received while under the repeater's coverage, (2) the characterized environment of the repeater, and/or (3) the propagation delays for a transmission received at the remote terminal. Additional ambiguity resulting from being under a repeater's coverage may al so be accounted for and/or compensated by (1) discarding time measurements from repeated base stations, (2) adjusting the processing for position estimation to account for the additional ambiguity due to the repeater, (3) computing a series of position estimates based on multiple transmissions received from t he same originating base station and selecting the best estimate, and/or (4) computing a series of position estimates based on multiple transmissions fro m multiple originating base stations and selecting the best estimate.

公开(公告)号：AU8118101A

公开(公告)日：2002-02-18

申请号：AU8118101

申请日：2001-08-07

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED

IPC: H04J13/00 ,  H04B7/26 ,  H04B7/00

Abstract: A method and apparatus for calibrating a Base Station and Mobile Station for use in systems that use round trip delay and systems that do not use round trip delay.

公开(公告)号：AU4338401A

公开(公告)日：2001-09-17

申请号：AU4338401

申请日：2001-03-02

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED ,  SIMIC EMILIJA ,  WILBORN THOMAS ,  ZHANG HAITAO ,  FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  LIN JIAN

IPC: H04B1/04 ,  H03G3/20 ,  H03G3/30 ,  H04B7/005 ,  H04B7/24

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：CA2702881A1

公开(公告)日：2001-09-13

申请号：CA2702881

申请日：2001-03-02

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED ,  SIMIC EMILIJA ,  WILBORN THOMAS ,  ZHANG HAITAO ,  FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  LIN MING JASON YU

IPC: H04B1/04 ,  H03G3/20 ,  H03G3/30 ,  H04B7/005 ,  H04B7/24 ,  H04W88/02

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：ES2356515T3

公开(公告)日：2011-04-08

申请号：ES07110669

申请日：2001-03-02

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED ,  SIMIC EMILIJA ,  WILBORN THOMAS ,  ZHANG HAITAO ,  FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  LIN JIAN

IPC: H03G3/30 ,  H03G1/00 ,  H04B1/04 ,  H03G3/20 ,  H04B1/00 ,  H04B7/005 ,  H04B7/24

Abstract: Un procedimiento para ajustar la ganancia de señal en un transmisor con un primer elemento de ganancia y un segundo elemento de ganancia, en el cual el primer elemento de ganancia responde a un primer reloj de actualización y el segundo elemento de ganancia responde a un segundo reloj de actualización, en el que el segundo reloj de actualización es más rápido que el primer reloj de actualización y los relojes de actualización primero y segundo son asíncronos, comprendiendo el procedimiento: recibir un primer valor de configuración de ganancia para el primer elemento de ganancia y un segundo valor de configuración de ganancia para el segundo elemento de ganancia; generar una primera señal de control de ganancia, representativa del primer valor de configuración de ganancia; generar una segunda señal de control de ganancia, representativa del segundo valor de configuración de ganancia; alinear la primera señal de control de ganancia con el primer reloj de actualización, y ajustar la ganancia del primer elemento de ganancia en un primer momento de actualización; detectar un cambio en el valor de configuración de ganancia del primer elemento de ganancia; si se detecta un cambio en el valor de configuración de ganancia, alinear la segunda señal de control de ganancia con el primer reloj de actualización, para ajustar la ganancia del segundo elemento de ganancia en el primer momento de actualización; si no se detecta ningún cambio en el valor de configuración de ganancia, alinear la segunda señal de control de ganancia con el segundo reloj de actualización; ajustar una ganancia del primer elemento de ganancia con la primera señal alineada de control de ganancia; y ajustar una ganancia del segundo elemento de ganancia con la segunda señal alineada de control de ganancia.