-
公开(公告)号：AT492941T
公开(公告)日：2011-01-15
申请号：AT07110669
申请日：2001-03-02
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED , SIMIC EMILIJA , WILBORN THOMAS , ZHANG HAITAO , FILIPOVIC DANIEL , KAUFMAN RALPH , LIN JIAN
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
-
公开(公告)号：CA2401893C
公开(公告)日：2008-10-14
申请号：CA2401893
申请日：2001-03-02
Applicant: QUALCOMM INC
Inventor： WILBORN THOMAS , SIMIC EMILIJA , YOUNIS SAED
Abstract: An interface circuit for converting a digital signal to an analog signal. The interface circuit includes a time response adjustment circuit, a modulator, and a filter. The time response adjustment circuit receives the digital signal and generates an adjusted signal. The modulator couples to the time response adjustment circuit, receives the adjusted signal, and generates a modulator signal. The filter couples to the modulator, receives the modulator signal, and generates the analog signal. The analog signal has a time response that is modified by the time response adjustment circuit. In an embodiment, the time response adjustment circuit includes a gain element, a delay element, and a summer. The gain element receives and scales the digital signal by a scaling factor. The delay element receives and delays the digital signal by a time delay. The summer couples to the gain element and the delay element, sums the scaled signal from the gain element and the delayed signal from the delay element to generate the adjusted signal.
-
公开(公告)号：AU2006203600A1
公开(公告)日：2006-09-07
申请号：AU2006203600
申请日：2006-08-21
Applicant: QUALCOMM INC
Inventor： WILBORN THOMAS , LIN JIAN , ZHANG HAITAO , SIMIC EMILIJA , KAUFMAN RALPH , YOUNIS SAED G , FILIPOVIC DANIEL
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
-
公开(公告)号：CA2739554A1
公开(公告)日：2001-09-13
申请号：CA2739554
申请日：2001-03-02
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED , SIMIC EMILIJA , WILBORN THOMAS , ZHANG HAITAO , FILIPOVIC DANIEL , KAUFMAN RALPH , LIN MING JASON YU
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
-
公开(公告)号：CA2401893A1
公开(公告)日：2001-09-13
申请号：CA2401893
申请日：2001-03-02
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED , WILBORN THOMAS , SIMIC EMILIJA
Abstract: An interface circuit for converting a digital signal to an analog signal. The interface circuit includes a time response adjustment circuit, a modulator, and a filter. The time response adjustment circuit receives the digital signal and generates an adjusted signal. The modulator couples to the time response adjustment circuit, receives the adjusted signal, and generates a modulator signal. The filter couples to the modulator, receives the modulator signal, and generates the analog signal. The analog signal has a time response that is modified by the time response adjustment circuit. In an embodiment, the time response adjustment circuit includes a gain element, a delay element, and a summer. The gain element receives and scales the digital signal by a scaling factor. The delay element receives and delays the digital signal by a time delay. The summer couples to the gain element and the delay element, sums the scaled signal from the gain element and the delayed signal from the delay element to generate the adjusted signal.
-
Patent Agency Ranking
公开(公告)号：ES2356515T3
公开(公告)日：2011-04-08
申请号：ES07110669
申请日：2001-03-02
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED , SIMIC EMILIJA , WILBORN THOMAS , ZHANG HAITAO , FILIPOVIC DANIEL , KAUFMAN RALPH , LIN JIAN
Abstract: Un procedimiento para ajustar la ganancia de señal en un transmisor con un primer elemento de ganancia y un segundo elemento de ganancia, en el cual el primer elemento de ganancia responde a un primer reloj de actualización y el segundo elemento de ganancia responde a un segundo reloj de actualización, en el que el segundo reloj de actualización es más rápido que el primer reloj de actualización y los relojes de actualización primero y segundo son asíncronos, comprendiendo el procedimiento: recibir un primer valor de configuración de ganancia para el primer elemento de ganancia y un segundo valor de configuración de ganancia para el segundo elemento de ganancia; generar una primera señal de control de ganancia, representativa del primer valor de configuración de ganancia; generar una segunda señal de control de ganancia, representativa del segundo valor de configuración de ganancia; alinear la primera señal de control de ganancia con el primer reloj de actualización, y ajustar la ganancia del primer elemento de ganancia en un primer momento de actualización; detectar un cambio en el valor de configuración de ganancia del primer elemento de ganancia; si se detecta un cambio en el valor de configuración de ganancia, alinear la segunda señal de control de ganancia con el primer reloj de actualización, para ajustar la ganancia del segundo elemento de ganancia en el primer momento de actualización; si no se detecta ningún cambio en el valor de configuración de ganancia, alinear la segunda señal de control de ganancia con el segundo reloj de actualización; ajustar una ganancia del primer elemento de ganancia con la primera señal alineada de control de ganancia; y ajustar una ganancia del segundo elemento de ganancia con la segunda señal alineada de control de ganancia.
-
公开(公告)号：AU2010214743A1
公开(公告)日：2010-09-23
申请号：AU2010214743
申请日：2010-08-31
Applicant: QUALCOMM INC
Inventor： KAUFMAN RALPH , ZHANG HAITAO , YOUNIS SAED G , WILBORN THOMAS , FILIPOVIC DANIEL , LIN JIAN , SIMIC EMILIJA
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
-
公开(公告)号：AT448602T
公开(公告)日：2009-11-15
申请号：AT01916349
申请日：2001-03-02
Applicant: QUALCOMM INC
Inventor： YOUNIS SAED , SIMIC EMILIJA , WILBORN THOMAS , ZHANG HAITAO , FILIPOVIC DANIEL , KAUFMAN RALPH , LIN JIAN
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
-
公开(公告)号：AU2008200624A1
公开(公告)日：2008-03-06
申请号：AU2008200624
申请日：2008-02-08
Applicant: QUALCOMM INC
Inventor： FILIPOVIC DANIEL , KAUFMAN RALPH , YOUNIS SAED G , WILBORN THOMAS , LIN JIAN , ZHANG HAITAO , SIMIC EMILIJA
Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
-
10.发明专利
公开(公告)号：AU2003284883A1
公开(公告)日：2004-05-13
申请号：AU2003284883
申请日：2003-10-22
Applicant: QUALCOMM INC
Inventor： SIMIC EMILIJA , PATRICK CHRISTOPHER , ROWITCH DOUGLAS NEAL
Abstract: Position determination accuracy of a wireless communication device may be negatively affected by a large unaccounted GPS doppler bias, which in turn may affect GPS doppler estimations and GPS doppler measurements conducted by the wireless communication device. The quality of GPS doppler measurements is very important for position location, because poor quality GPS doppler measurements may prevent the wireless communication device from acquiring satellites in the most sensitive modes with narrow frequency ranges, which results in reduced GPS pseudorange measurement yield. Large unaccounted GPS doppler bias also adversely affects position accuracy because of the adverse effect on the GPS code phase measurements time propagation to common time prior to their use in position location calculation. The same is true in the case of unaccounted CDMA code doppler, through the adverse effect on the AFLT code phase measurements time propagation to common time prior to their use in a position location engine. This effect is the biggest concern in the case of large search windows. Therefore, the present disclosure provides a method of optimizing GPS based position location in the presence of time-varying frequency error, including the steps of continuously measuring and/or calculating resulting GPS doppler bias and CDMA code doppler bias and then minimizing their adverse effects with regard to position location determination by re-centering GPS doppler search windows based on the GPS doppler bias value, as well as using GPS doppler bias and CDMA code doppler bias value to properly propagate GPS pseudorange and AFLT pilot phase measurements, respectively, to common time prior to their use in a position location engine.
-
-
-
-
-
-
-
-
-
Search Results
50
records
(took 0.024 seconds)
