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    POWER REDUCTION THROUGH CLOCK MANAGEMENT
    34.
    发明公开
    POWER REDUCTION THROUGH CLOCK MANAGEMENT 审中-公开
    通过时钟管理降低功耗

    公开(公告)号：EP3304242A1

    公开(公告)日：2018-04-11

    申请号：EP16724558.8

    申请日：2016-05-09

    Applicant: Qualcomm Incorporated

    Inventor： KHAZIN, Alexander ,  AMARILIO, Lior

    IPC: G06F1/08 ,  G06F1/32 ,  H04R3/00

    CPC classification number: G06F3/165 ,  G06F1/08 ,  G06F1/324 ,  G11B27/3036 ,  H04R3/00 ,  H04R2460/03 ,  Y02D10/126

    Abstract: Power reduction through clock management techniques are disclosed. In one aspect, the clock management is applied to a clock signal on a SOUNDWIRE™ communication bus. In particular, a control system associated with a master device on the communication bus may evaluate frequency requirements of audio streams on the communication bus and select a lowest possible clock frequency that meets the frequency requirements. Lower clock frequencies result in fewer clock transitions and result in a net power saving relative to higher clock frequencies. In the event of a clock frequency change, the master device communicates the clock frequency that will be used prospectively to slave devices on the communication bus, and all devices transition to the new frequency at the same frame boundary. In addition to the power savings, exemplary aspects of the present disclosure do not impact an active audio stream.

    ON-BOARDING A DEVICE TO A SECURE LOCAL NETWORK
    35.
    发明公开
    ON-BOARDING A DEVICE TO A SECURE LOCAL NETWORK 审中-公开
    将设备安装到安全的本地网络

    公开(公告)号：EP3175641A1

    公开(公告)日：2017-06-07

    申请号：EP15760531.2

    申请日：2015-07-22

    Applicant: Qualcomm Incorporated

    Inventor： ZEHAVI, Doron ,  AMARILIO, Lior ,  SHUSTERMAN, Zeev

    IPC: H04W12/08 ,  H04W4/00 ,  H04W48/08 ,  H04L29/08

    CPC classification number: H04W12/08 ,  G06F9/4411 ,  H04L67/12 ,  H04W4/70 ,  H04W8/005 ,  H04W12/06 ,  H04W48/04 ,  H04W48/08

    Abstract: In an embodiment, a control device that is configured to onboard a target device to a secure local network by discovering a set of devices over a bootstrapping interface, establishing a bootstrap connection to at least one device from the set of devices in response to the discovery without authorizing the at least one device to access the secure local network, instructing the at least one device via the bootstrap connection to activate an observable function that is configured to be observable to one or more observation entities that are separate from the control device and are in proximity to the at least one device, determining whether an operator of the control device verifies that the observable function has been successfully detected as performed by the target device and selectively authorizing the at least one device to access the secure local network based on the determination.

    Abstract translation: 在一个实施例中，控制设备被配置为通过在自举接口上发现一组设备来将目标设备载入到安全本地网络，响应于该发现建立到来自该组设备的至少一个设备的引导连接 在没有授权所述至少一个设备访问所述安全本地网络的情况下，经由所述引导程序连接指示所述至少一个设备激活被配置为对于与所述控制设备分离的一个或多个观察实体可观察的可观察功能，并且 在所述至少一个设备附近，确定所述控制设备的操作者是否验证所述可观察功能已被成功检测为由所述目标设备执行，并且基于所述确定选择性授权所述至少一个设备访问所述安全本地网络 。

    MULTI-CHANNEL AUDIO ALIGNMENT SCHEMES
    38.
    发明公开
    MULTI-CHANNEL AUDIO ALIGNMENT SCHEMES 审中-公开
    多通道音频对齐方案

    公开(公告)号：EP3219111A1

    公开(公告)日：2017-09-20

    申请号：EP15788251.5

    申请日：2015-10-09

    Applicant: Qualcomm Incorporated

    Inventor： HARIHARAN, Magesh ,  AMARILIO, Lior ,  ARCEO, Julio ,  BALATSOS, Aris ,  GRUBER, Hans Georg

    IPC: H04R5/04 ,  G06F3/16 ,  G06F13/42 ,  H04M1/60

    CPC classification number: H04L65/4069 ,  G06F3/162 ,  G06F13/4291 ,  H04R3/12 ,  H04R5/04 ,  H04R2420/09 ,  H04R2499/11

    Abstract: Multi-channel audio alignment schemes are disclosed. One aspect of the present disclosure provides for accumulation of audio samples across multiple related audio channels at an audio source. Related audio channels indicate their interrelatedness, and when all the related audio channels have data to transmit, the source releases the data onto the time slots of the Serial Low-power Inter-chip Media Bus (SLIMbus), such that the related audio channels are within a given segment window of the time slot. This accumulation is repeated at the boundary of every segment window. Similarly, accumulation may be performed at the audio sink. Components within the audio sink may only read received data if status signals from all related sinks indicate that predefined thresholds have been reached. By providing such accumulation options, audio fidelity is maintained across multiple audio data channels.

    Abstract translation: 公开了多声道音频对齐方案。 本公开的一个方面提供了在音频源处跨越多个相关音频声道的音频样本的累积。 相关音频通道指示它们之间的相互关系，并且当所有相关音频通道都有数据要传输时，源将数据释放到串行低功耗片间媒体总线（SLIMbus）的时隙上，使得相关音频通道 在时隙的给定分段窗口内。 这个累积在每个分段窗口的边界处重复。 类似地，可以在音频接收器处执行累积。 如果来自所有相关接收器的状态信号指示已达到预定义阈值，则音频接收器内的组件只能读取接收到的数据。 通过提供这样的累积选项，跨多个音频数据信道保持音频保真度。

    MULTI-CHANNEL AUDIO COMMUNICATION IN A SERIAL LOW-POWER INTER-CHIP MEDIA BUS (SLIMBUS) SYSTEM
    39.
    发明公开
    MULTI-CHANNEL AUDIO COMMUNICATION IN A SERIAL LOW-POWER INTER-CHIP MEDIA BUS (SLIMBUS) SYSTEM 审中-公开
    串行低功耗片间媒体总线（SLIMBUS）系统中的多通道音频通信

    公开(公告)号：EP3189442A1

    公开(公告)日：2017-07-12

    申请号：EP15763748.9

    申请日：2015-09-02

    Applicant: Qualcomm Incorporated

    Inventor： AMARILIO, Lior ,  BALATSOS, Aris

    IPC: G06F13/42 ,  G06F13/28

    CPC classification number: G06F3/162 ,  G06F13/28 ,  G06F13/287 ,  G06F13/4282 ,  H04S3/008

    Abstract: Multi-channel audio communication in a Serial Low-power Inter-chip Media Bus (SLIMbus) system is disclosed. In this regard, in one aspect, a multi-channel output port is provided in a SLIMbus system. The multi-channel output port receives an audio stream from an audio source (e.g., a storage medium) via a direct memory access (DMA) pipe and distributes the audio stream to multiple receiving ports (e.g., speakers) over multiple data channels, all connected to the single multi-channel output port. In another aspect, a multi-channel input port is provided in a SLIMbus system. The multi-channel input port connects to multiple data channels from multiple distributing ports (e.g., microphones). By providing the multi-channel output port and/or the multi-channel input port in a SLIMbus system, it is possible to support multiple data channels with a single DMA pipe, thus improving implementation flexibilities and efficiencies of the SLIMbus system.

    Abstract translation: 公开了串行低功耗片间媒体总线（SLIMbus）系统中的多通道音频通信。 就这一点而言，在一个方面中，在SLIMbus系统中提供多通道输出端口。 多声道输出端口经由直接存储器存取（DMA）管道从音频源（例如，存储介质）接收音频流，并且通过多个数据信道将音频流分发到多个接收端口（例如扬声器），全部 连接到单个多通道输出端口。 另一方面，在SLIMbus系统中提供多通道输入端口。 多声道输入端口连接来自多个分配端口（例如麦克风）的多个数据信道。 通过在SLIMbus系统中提供多通道输出端口和/或多通道输入端口，可以用单个DMA管道支持多个数据通道，从而提高SLIMbus系统的灵活性和效率。

    REDUCING LATENCY ON LONG DISTANCE POINT-TO-POINT LINKS
    40.
    发明申请
    REDUCING LATENCY ON LONG DISTANCE POINT-TO-POINT LINKS 审中-公开

    公开(公告)号：WO2020102037A1

    公开(公告)日：2020-05-22

    申请号：PCT/US2019/060606

    申请日：2019-11-08

    Applicant: QUALCOMM INCORPORATED

    Inventor： BENJAMINI, Yiftach ,  YIFRACH, Shaul Yohai ,  AMARILIO, Lior

    IPC: G06F13/42

    Abstract: Systems and methods for reducing latency on long distance point-to-point links where the point-to-point link is a Peripheral Component Interconnect (PCI) express (PCIE) link that modifies a receiver to advertise infinite or unlimited credits. A transmitter sends packets to the receiver. If the receiver's buffers fill, the receiver, contrary to PCIE doctrine, drops the packet and returns a negative acknowledgement (NAK) packet to the transmitter. The transmitter, on receipt of the NAK packet, resends packets beginning with the one for which the NAK packet was sent. By the time these resent packets arrive, the receiver will have had time to manage the packets in the buffers and be ready to receive the resent packets.

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