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公开(公告)号：US20200066781A1
公开(公告)日：2020-02-27
申请号：US16549069
申请日：2019-08-23
Applicant: RAYTHEON COMPANY
Inventor： Eric J. Beuville , Micky Harris , Ryan Boesch , Christian M. Boemler
IPC: H01L27/146 , H01L27/148 , H04N5/359
Abstract: A pixel includes a photo-diode, an integration capacitor arranged to receive a photo current from the photo-diode and to store charge developed from the photo current; and an injection transistor disposed between the photo-diode and the integration capacitor that controls flow of the photo current from the photo-diode to the integration capacitor, the injection transistor having a gate, a source electrically coupled to the photo-diode at a first node, and a drain electrically coupled to the integration capacitor. The injection transistor is a silicon-oxide-nitride-oxide-silicon (SONOS) FET having its gate set to a SONOS gate voltage to control a detector bias voltage of the photo-diode at the first node.
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公开(公告)号：US20200029042A1
公开(公告)日：2020-01-23
申请号：US16040780
申请日：2018-07-20
Applicant: Raytheon Company
Inventor： Jehyuk Rhee , Angelika Kononenko , Christian M. Boemler
IPC: H04N5/378 , H04N5/33 , H04N5/3745
Abstract: Methods and apparatus for a dual mode focal plane array having a background module including a first capacitor to integrate a first signal for a first amount of time, wherein the first signal comprises a background signal, and a signal module including a second capacitor to integrate a second signal for a second amount of time, wherein the second signal comprises a signal of interest and the background signal, wherein the first and second capacitors have impedance values in a first ratio, and wherein the first amount of time and the second amount of time define a second ratio corresponding to the first ratio.
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公开(公告)号：US10425604B2
公开(公告)日：2019-09-24
申请号：US15297225
申请日：2016-10-19
Applicant: Raytheon Company
Inventor： Christian M. Boemler
Abstract: An electro-optical sensor chip assembly (SCA) that includes a detection device that includes an array of detector unit cells arranged in a matrix and that produce an electrical output in response to light. The SCA also includes an integrated control circuit in electrical communication with the detection device that includes a control word store to store a dataword. The control word store includes at least three sub-latches to redundantly store at least one bit of the dataword. The at least three sub-latches include a first sub-latch, a second sub-latch and a third sub-latch, each of the first sub-latch, the second sub-latch and the third sub-latch including an output and two recovery inputs, and the output of the first and third sub-latches are connected to the recovery inputs of the second sub-latch.
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34.发明申请公开(公告)号：US20190180113A1
公开(公告)日：2019-06-13
申请号：US16279182
申请日：2019-02-19
Applicant: Raytheon Company
Inventor： Micky R. Harris , Eric J. Beuville , Juliette S. Costa , Christian M. Boemler , Mark A. Massie
IPC: G06K9/00 , G01J1/02 , H04N1/409 , H04N5/14 , H04N5/355 , G01S17/02 , H04N5/369 , H04N5/3745 , G01T1/17
Abstract: A method includes repeatedly charging and discharging a capacitor, where the capacitor is charged based on illumination received at a pixel. The method also includes comparing a voltage stored on the capacitor with a reference voltage using a comparator. The method further includes incrementing or decrementing a first counter value of a first counter each time a comparator output indicates that the capacitor voltage has reached the reference voltage during a first period of time. The method also includes incrementing or decrementing a second counter value of a second counter each time the comparator output indicates that the capacitor voltage has reached the reference voltage during multiple smaller second periods of time within the first period of time. In addition, the method includes resetting the second counter for each second period of time and generating a pixel event indicator in response to the second counter value obtaining a value indicative of a bright intensity event.
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公开(公告)号：US10084468B1
公开(公告)日：2018-09-25
申请号：US15466417
申请日：2017-03-22
Applicant: Raytheon Company
Inventor： Christian M. Boemler
Abstract: A single slope analog to digital converter includes a comparator having a positive input and a negative input and a comparator output, a counter and a latch connected to an output of the counter and that includes a trigger input. Also included is a pulse generator coupled to the comparator output that produces a pulse of a defined width each time a signal on the negative input transitions from a voltage level that is below a voltage level on the positive input to a voltage level that is above the voltage level on the positive input.
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Patent Agency Ranking
公开(公告)号：US11626445B2
公开(公告)日：2023-04-11
申请号：US16549069
申请日：2019-08-23
Applicant: RAYTHEON COMPANY
Inventor： Eric J. Beuville , Micky Harris , Ryan Boesch , Christian M. Boemler
IPC: H01L27/146 , H04N5/359 , H01L27/148
Abstract: A pixel includes a photo-diode, an integration capacitor arranged to receive a photo current from the photo-diode and to store charge developed from the photo current; and an injection transistor disposed between the photo-diode and the integration capacitor that controls flow of the photo current from the photo-diode to the integration capacitor, the injection transistor having a gate, a source electrically coupled to the photo-diode at a first node, and a drain electrically coupled to the integration capacitor. The injection transistor is a silicon-oxide-nitride-oxide-silicon (SONOS) FET having its gate set to a SONOS gate voltage to control a detector bias voltage of the photo-diode at the first node.
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公开(公告)号：US20220279138A1
公开(公告)日：2022-09-01
申请号：US17188869
申请日：2021-03-01
Applicant: Raytheon Company
Inventor： Christian M. Boemler
Abstract: Methods and apparatus for an imaging sensor having background subtraction including integrating photocurrent on a first capacitor, and, after a voltage on the first capacitor reaches a threshold, directing the photocurrent to a second capacitor. The first capacitor can be reset. This can be repeated a given number of times until a value on the second capacitor is read out.
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公开(公告)号：US20220115423A1
公开(公告)日：2022-04-14
申请号：US17068223
申请日：2020-10-12
Applicant: Raytheon Company
Inventor： Eric Miller , Christian M. Boemler , Justin Gordon Adams Wehner , Drew Fairbanks , Sean P. Kilcoyne
IPC: H01L27/146 , H01L27/148 , H04N5/378
Abstract: Methods and apparatus for an assembly having directly bonded first and second wafers where the assembly includes a backside surface and a front side surface. The first wafer includes IO signal connections vertically routed to the direct bonding interface by a first one of the bonding posts on the first wafer bonded to a first one of the bonding posts on the second wafer. The second wafer includes vertical routing of the IO signal connections from first one though the bonding posts on the second wafer to IO pads on a backside surface of the assembly.
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公开(公告)号：US20210377470A1
公开(公告)日：2021-12-02
申请号：US16890483
申请日：2020-06-02
Applicant: Raytheon Company
Inventor： Neil R. Malone , Micky Harris , Adam M. Kennedy , George Paloczi , John L. Vampola , Christian M. Boemler
IPC: H04N5/355 , H04N5/378 , H04N5/3745
Abstract: A digital pixel includes a capacitive transimpedence amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.
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公开(公告)号：US11063074B2
公开(公告)日：2021-07-13
申请号：US16592048
申请日：2019-10-03
Applicant: RAYTHEON COMPANY
Inventor： Christian M. Boemler
Abstract: A buffered direct injection pixel can be operated such that it is automatically zeroed. The operation includes: during a normal operating mode, controlling a gate voltage of an injection transistor with the output of an amplifier to control a bias of photo-current source, an inverting input of the amplifier being connected to input of the injection transistor through a nulling capacitor; during a nulling operation, closing a first switch to connect the nulling capacitor directly to an output of the amplifier; during the nulling operation, closing a second switch to directly couple the input of the injection transistor to a bias voltage causing the nulling capacitor to store a difference between an output of the amplifier and the bias voltage; and after the nulling operation, providing the voltage stored on the nulling capacitor to the inverting input by opening the first and second switches.
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