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公开(公告)号:JPS5357921A
公开(公告)日:1978-05-25
申请号:JP13352176
申请日:1976-11-05
Applicant: SONY CORP
Inventor: MIURA HIDEKI
Abstract: PURPOSE:To automatically make color correction with the VIR signal, by attaching a control circuit to the chromatic circuit simply.
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公开(公告)号:JPH0221195B2
公开(公告)日:1990-05-14
申请号:JP25496186
申请日:1986-10-27
Applicant: SONY CORP
Inventor: MIURA HIDEKI
IPC: H04N5/57
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公开(公告)号:JPS57211879A
公开(公告)日:1982-12-25
申请号:JP9728081
申请日:1981-06-23
Applicant: SONY CORP
Inventor: HISHIKI YOSHIO , MIURA HIDEKI , SHIBUYA MASATO
Abstract: PURPOSE:To display a character, pattern, etc. by using an output transistor while switching it to an emitter grounded amplifier circuit configuration and a base grounded amplifier circuit configuration to reduce the change of circuit configuration of a color television receiver. CONSTITUTION:At the reproduction of a normal TV broadcasting signal, a low level signal is supplied to a switching signal input terminal 4S as a switching signal. At that time, a transistor (TR) 12 is turned on, a TR 6R operates as an emitter earthing type amplifier and a regenerative picture for color TV broadcasting can be obtained by a color cathode-ray tube. In case of displaying characters, patterns, etc. by digital signals from a microcomputer or the like, a high level signal is supplied to the switching signal input terminal 4S as a switching signal. At that time, the TR 6R operates as a base grounding type amplifier circuit and a digital signal from a digital signal input terminal 5R is displayed on a color cathode-ray tube.
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公开(公告)号:JPS57103485A
公开(公告)日:1982-06-28
申请号:JP17989080
申请日:1980-12-18
Applicant: SONY CORP
Inventor: MIURA HIDEKI
IPC: H04N9/64
Abstract: PURPOSE:To use a single averaging circuit to receive plural TV signals different to standard system, by changing the clock frequency applied to a delay element to average color difference signals of adjacent horizontal periods. CONSTITUTION:A chrominance subcarrier signal is supplied to a pair of demodulators 14 and 15 for the purpose of demodulating color difference signals R-Y and B-Y. This chrominance subcarrier signal is different in TV standard systems of a received TV signal. Consequently, if a switch SW4 is switched in accordance with the received signal, signals R-Y and B-Y which are always delayed by 1H are obtained by single averaging circuits 30 and 40 provided in respective color signal transmission systems because the number of bits of delay elements 31 and 41 is fixed. Consequently, when the TV signal is in the NTSC system, cross color is eliminated by averaging signals R-Y and B-Y of adjacent horizontal periods. When the TV signal is in the PAL system, differential gain distortion is eliminated besides cross color in systems N and M.
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公开(公告)号:JPH025073B2
公开(公告)日:1990-01-31
申请号:JP720180
申请日:1980-01-24
Applicant: SONY CORP
Inventor: MIURA HIDEKI
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公开(公告)号:JPS6297479A
公开(公告)日:1987-05-06
申请号:JP25496186
申请日:1986-10-27
Applicant: SONY CORP
Inventor: MIURA HIDEKI
IPC: H04N5/57
Abstract: PURPOSE:To attain a temperature compensation with a simple constitution by providing only one gain controller controlled with a closed loop, and performing a contrast adjustment and a drive adjustment varying either of the level of a reference pulse or the reference level of a comparator. CONSTITUTION:Primary color signals SR-SB are supplied to terminals 1R, 1G, and 1B, and are supplied to pulse insertion circuits 12R-12B through clamping circuits 21R-21B. Also, a reference pulse PR from a forming circuit 11 is supplied to the pulse insertion circuits, and the reference signal is inserted within horizontal blanking periods of the primary signals SR-SB. And the primary color signals are supplied to gain controllers 23R-23B equipped with the temperature compensation. And by adjusting a variable resistor VRC and controlling the peak value of the reference pulse PR, the contrast adjustment can be performed, and also, by adjusting variable resistors VRR-VRB and controlling the reference level of a comparator 16, a drive voltage can be adjusted independently.
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公开(公告)号:JPS6218182A
公开(公告)日:1987-01-27
申请号:JP15652585
申请日:1985-07-16
Applicant: SONY CORP
Inventor: TAKADA HIROTAKA , MIURA HIDEKI
Abstract: PURPOSE:To improve frequency characteristics by applying an anti-phase broad band video signal to the cathode of a cathode ray tube and the 1st grid, apply ing a blanking signal to the 2nd grid and decreasing a power voltage of a video amplifier so as to reduce the effect of stray capacitance. CONSTITUTION:In applying an anti-phase broad band video signal to the cathode K of the cathode ray tube 3 and the 1st grid G1, a blanking signal is fed to the 2nd grid G2. Thus, it is not required to increase the power voltage of a transistor (TR)6 than the case with the blanking by applying the blanking signal to the base of the TR6 of the video amplifier 2 and it is not required to increase the resistance of a load resistor 7. Since the blanking signal is a square pulse for decreasing the applied voltage of the 2nd grid G2 of the cathode ray tube 3 only during the blanking period, even when the voltage is nearly 200V, a large power is not required for generation. Thus, power is saved and the stray capacitance 9 due to the load resistor 7 is reduced and the frequency characteristics are improved.
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公开(公告)号:JPS5881386A
公开(公告)日:1983-05-16
申请号:JP18017381
申请日:1981-11-10
Applicant: SONY CORP
Inventor: MIURA HIDEKI , OKUMURA SHIGERU , SUZUKI MANABU
Abstract: PURPOSE:To receive a high-fineness system and a standard system signal selectively by storing a standard system demodulation output in a memory when a standard system color video signal is received, and reading the same signal twice at a doubled speed within a 1-line period. CONSTITUTION:A discriminating circuit 31 discriminated whether a video signal applied to an input terminal 11 is a high-fineness system or a standard system signal, and on the basis of its discrimination output, changeover switches 12, 16, 53, 64, and 72 for the input and output of the color decoders of 13H and 13N, AFC circuit 60, oscillation frequency correcting circuit 65, and horizontal deflection width setting circuit 73 are switched. When a standard system color video signal is received, the output of a standard system color decoder 13N is written in two line memories. In a 1-line period, 1-line signals of the same contents are read twice at a doubled speed and displayed on a CRT. Consequently, a picture consisting of scanning lines twice as many as a conventional picture is obtained during standard system reception.
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公开(公告)号:JPS57141194A
公开(公告)日:1982-09-01
申请号:JP2731081
申请日:1981-02-26
Applicant: SONY CORP
Inventor: MIURA HIDEKI , NAKAGAWA YUTAKA , HORI NOBUHIRO
Abstract: PURPOSE:To perform color killing operation by discriminating a PAL system color television signal by detecting a current flowing through a smoothing circuit and controlling a discriminating circuit by its detection output. CONSTITUTION:A current detecting circuit 40 detects a current flowing through a smoothing circuit 22. The detection output of the circuit 40 is supplied to a line discriminating circuit 33 as a discriminating circuit for a PAL system color television signal. When a color burst signal loses the continuation of its phase, a phase detecting circuit 19 outputs a positive pulse, and a reproduced picture changes from a positive mode to a negative one. On the basis of this positive pulse, a current inverse of that in normal operation flows through the current 22 and is detected by a resistance 38 to turn on a transistor 39 momentarily. A pulse divided into two inverts the state of an FF circuit 28 twice. Consequently, a color demodulator 8 is supplied with a correct-phase subcarrier signal to reset the reproduced picture to the positive mode.
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