公开(公告)号：KR820001528B1

公开(公告)日：1982-08-27

申请号：KR740003986

申请日：1974-11-04

Applicant: SONY CORP

Inventor： MIURA HIDEKI

IPC: H01L29/70

Abstract: In the circuit, the junction-type G-LEC(13) is connected with a resistor(31) and an another resistor(34), and the gate of said G-LEC is coupled to the bias power source(43) through a diode(12) and a resistor(36) and also be earthed through a resistor(31). When the environmental temperature rises, the gate voltage(VG) as well as the emitter voltage(VE) of the G-LEC(13) also rises. Consequently, even though the environmental temperature is rising, gate-emitter voltage(VGE) can be sustained constantly and also, the hFE and collector current are constant.

公开(公告)号：NO139584C

公开(公告)日：1979-04-04

申请号：NO300272

申请日：1972-08-22

Applicant: SONY CORP

Inventor： MIURA HIDEKI ,  YAMAKAWA KIYOSHI

IPC: H04N9/465 ,  H04N9/50 ,  H04N9/39

公开(公告)号：CA1018614A

公开(公告)日：1977-10-04

申请号：CA225939

申请日：1975-04-30

Applicant: SONY CORP

Inventor： MIURA HIDEKI

IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/00 ,  H01L27/06 ,  H01L29/73 ,  H03F3/72 ,  H03H11/18 ,  H03H11/20 ,  H04N9/465

Abstract: A phase switching circuit utilizing a novel bidirectional transistor having a signal applied to its base and a flip-flop circuit arrangement coupled to its output terminals which may be referred to as either collector or emitter depending upon the operation state of the circuit. The flip-flop circuit has a pair of transistors which act as switches and which are respectively coupled in series with the output terminals of the bidirectional transistor. When each of the flip-flop transistors is conducting, a power supply signal is conducted in opposite directions through the bidirectional transistor depending upon which of the transistors is in the on and which is in the off state. Essentially, the switching action of the flip-flop circuit converts the operation of the bidirectional transistor between emitter follower and collector follower configurations, hence the output signal is shifted from a signal which is in phase with the input signal to a signal which is out of phase with that input signal.

公开(公告)号：DE2520826A1

公开(公告)日：1975-11-20

申请号：DE2520826

申请日：1975-05-09

Applicant: SONY CORP

Inventor： MIURA HIDEKI ,  FUJIMOTO TOSHIRO

IPC: H04N9/455 ,  H01L21/331 ,  H01L29/08 ,  H01L29/73 ,  H03C1/36 ,  H03F3/72

Abstract: A sampling circuit is provided which includes a fourterminal semiconductor device of the type having a low emitter doping concentration. The signal to be sampled is fed continuously through the semiconductor device to an output terminal. A gating pulse applied between the gate and the emitter of the semiconductor device raising the current amplification characteristic hFE from a very low level to a high level during the period that the gating pulse is on. This causes a highly amplified signal to appear at the output. When the gating pulse is removed the current amplification characteristic hFE returns to low level and the amplitude of the signal at the output becomes very low.

公开(公告)号：DE2241485A1

公开(公告)日：1973-03-08

申请号：DE2241485

申请日：1972-08-23

Applicant: SONY CORP

Inventor： MIURA HIDEKI ,  YAMAKAWA KIYOSHI

IPC: H04N9/465 ,  H04N9/36

公开(公告)号：FI55740B

公开(公告)日：1979-05-31

申请号：FI234172

申请日：1972-08-23

Applicant: SONY CORP

Inventor： MIURA HIDEKI ,  YAMAKAWA KIYOSHI

IPC: H04N9/465 ,  H04N9/50

公开(公告)号：NO139584B

公开(公告)日：1978-12-27

申请号：NO300272

申请日：1972-08-22

Applicant: SONY CORP

Inventor： MIURA HIDEKI ,  YAMAKAWA KIYOSHI

IPC: H04N9/465 ,  H04N9/50 ,  H04N9/39

公开(公告)号：AU8037975A

公开(公告)日：1976-10-28

申请号：AU8037975

申请日：1975-04-22

Applicant: SONY CORP

Inventor： MIURA HIDEKI

IPC: H04N5/08 ,  H01L29/00 ,  H03G3/34 ,  H03G11/00 ,  H04B1/10 ,  H04N5/213 ,  H01L13/00

公开(公告)号：CA1032229A

公开(公告)日：1978-05-30

申请号：CA225940

申请日：1975-04-30

Applicant: SONY CORP

Inventor： MIURA HIDEKI ,  FUJIMOTO TOSHIHIRO

IPC: H04N9/455 ,  H01L21/331 ,  H01L29/08 ,  H01L29/73 ,  H03C1/36

Abstract: A sampling circuit is provided which includes a fourterminal semiconductor device of the type having a low emitter doping concentration. The signal to be sampled is fed continuously through the semiconductor device to an output terminal. A gating pulse applied between the gate and the emitter of the semiconductor device raising the current amplification characteristic hFE from a very low level to a high level during the period that the gating pulse is on. This causes a highly amplified signal to appear at the output. When the gating pulse is removed the current amplification characteristic hFE returns to low level and the amplitude of the signal at the output becomes very low.

公开(公告)号：AU8142975A

公开(公告)日：1976-11-25

申请号：AU8142975

申请日：1975-05-22

Applicant: SONY CORP

Inventor： MIURA HIDEKI

IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/00 ,  H01L27/06 ,  H01L29/73 ,  H03F3/72 ,  H03H11/18 ,  H03H11/20 ,  H04N9/465 ,  H03K17/68 ,  H03K17/74

Abstract: A phase switching circuit utilizing a novel bidirectional transistor having a signal applied to its base and a flip-flop circuit arrangement coupled to its output terminals which may be referred to as either collector or emitter depending upon the operation state of the circuit. The flip-flop circuit has a pair of transistors which act as switches and which are respectively coupled in series with the output terminals of the bidirectional transistor. When each of the flip-flop transistors is conducting, a power supply signal is conducted in opposite directions through the bidirectional transistor depending upon which of the transistors is in the on and which is in the off state. Essentially, the switching action of the flip-flop circuit converts the operation of the bidirectional transistor between emitter follower and collector follower configurations, hence the output signal is shifted from a signal which is in phase with the input signal to a signal which is out of phase with that input signal.