公开(公告)号：EP0913832B1

公开(公告)日：2003-07-23

申请号：EP97830566.2

申请日：1997-11-03

Applicant: STMicroelectronics S.r.l.

Inventor： Pasotti, Marco ,  Rolandi, Pier Luigi ,  Canegallo, Roberto ,  Gerna, Danilo ,  Chioffi, Ernestina

IPC: G11C11/56 ,  G11C27/00

CPC classification number: G11C11/5621 ,  G11C11/5628

公开(公告)号：EP0872850B1

公开(公告)日：2003-07-02

申请号：EP97830172.9

申请日：1997-04-14

Applicant: STMicroelectronics S.r.l.

Inventor： Gerna, Danilo ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Pasotti, Marco ,  Rolandi, Pier Luigi

IPC: G11C27/00 ,  G11C16/06

CPC classification number: G11C16/28 ,  G11C27/005

公开(公告)号：EP1219934A1

公开(公告)日：2002-07-03

申请号：EP00830780.3

申请日：2000-11-28

Applicant: STMicroelectronics S.r.l.

Inventor： Sergio, Maximilian ,  Manaresi, Nicolò ,  Tartagni, Marco ,  Canegallo, Roberto

IPC: G01D5/24

CPC classification number: G01D5/24

Abstract: A method for reading a capacitive sensor ( Fig. 1 ), constituted by an array of capacitors (C PIX_JK ) ordered in rows and columns functionally connected through row lines (R J ), each one electrically constituting a first plate in common to all the capacitors of a row, and through column lines (C K ), each one electrically constituting a second plate in common to all the capacitors of a column, the two sets of plates being orthogonal or quasi-orthogonal to each other, is provided.
The method may be implemented by a circuit for biasing and reading capacitances that includes circuits for selecting a column line and a row line, a charge amplifier producing an output voltage representing the capacitance of the selected capacitor intercepted by the selected column and row lines, and comprises the steps of preliminarily resetting the output voltage of the charge amplifier, connecting to a reference voltage all the deselected row and column plates of the array and connecting an auxiliary capacitor and the selected capacitor to an inverting input of the amplifier and as feedback capacitor of said amplifier, respectively, or viceversa, applying a step voltage on the capacitor that is connected to the inverting input of the amplifier and reading at steady-state, the output voltage.
An integrated reading system ( Fig. 2 ) for a capacitive sensor is also provided.

Abstract translation: 一种读取电容式传感器（图1）的方法，由电容器阵列（CPIX_JK）构成，该电容器阵列以行和列排列，该行和列通过行线（RJ）功能连接，每个电容传感器电气地构成与所有电容器 一列，并且通过列线（CK），每个电子构成与列的所有电容器共同的第二板，两组板彼此正交或准正交。 该方法可以由用于偏置和读取电容的电路来实现，电容包括用于选择列线和行线的电路，产生表示由所选列和行线截取的所选电容器的电容的输出电压的电荷放大器，以及 包括以下步骤：预先重置电荷放大器的输出电压，连接到阵列的所有未选择的列和列板的参考电压，并将辅助电容器和所选择的电容器连接到放大器的反相输入端，并作为反馈电容器 分别表示放大器，或反之，对连接到放大器的反相输入端的电容器施加一个阶跃电压，并在稳态下读出输出电压。 还提供了用于电容式传感器的集成阅读系统（图2）。

公开(公告)号：EP0877386A1

公开(公告)日：1998-11-11

申请号：EP97830216.4

申请日：1997-05-09

Applicant: STMicroelectronics S.r.l.

Inventor： Rolandi, Pierluigi ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Gerna, Danilo ,  Pasotti, Marco

IPC: G11C27/00

CPC classification number: G11C27/005

Abstract: For each cell (1) to be programmed, the present threshold value (V o ) of the cell is determined; the desired threshold value (V TAR ) is acquired; the analog distance between the present threshold value and the desired threshold value is calculated; and a programming pulse (S) is then generated, the duration of which is proportional to the analog distance calculated. The programming and reading cycle is repeated until the desired threshold is reached. By this means a time saving is obtained, owing to the reduction of the number of intermediate reading steps. The method permits programming in parallel and simultaneously of a plurality of cells (1) of a memory array (2) which is connected to a single word line (5 1 ) and to different bit lines (4 1 - 4 N ), each with a programming pulse (S 1 - S N ) the duration of which is proportional to the analog distance calculated for the same cell. The programming process is thus very fast, owing to parallel application of the programming and the saving in the intermediate reading cycles.

Abstract translation: 对于每个电池（1）要被编程，本阈值（VO）的单元的是确定性的矿洞; 所需的阈值（VTAR）被获取; 本阈值和阈值之间的模拟距离要的计算出; 并然后产生一编程脉冲（S），所有的持续时间成比例的计算值模拟距离。 重复编程和读取周期，直到达到所需的阈值。 通过这种方式一个省时的获得，由于中间步骤读取的数目的减少。 该方法允许在并行和同时单元的多个编程（1），其连接到一个单一的字线（51）和到不同的位线（41 - 4N）的存储器阵列（2）所有的，每一个编程脉冲 （S1 - SN）的所有的持续时间成比例的用于相同小区中计算出的模拟距离。 编程过程因此是非常快的，由于编程的并行应用和中间读周期节省。

公开(公告)号：EP0872850A1

公开(公告)日：1998-10-21

申请号：EP97830172.9

申请日：1997-04-14

Applicant: STMicroelectronics S.r.l.

Inventor： Gerna, Danilo ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Pasotti, Marco ,  Rolandi, Pier Luigi

IPC: G11C27/00 ,  G11C16/06

CPC classification number: G11C16/28 ,  G11C27/005

Abstract: An analog reading circuit (10) comprising a current mirror circuit (19) forcing two identical currents into a cell (2) to be read and into a reference cell (27) and an operational amplifier (31) having an inverting input connected to the drain terminal (13) of the cell (2) to be read, a non-inverting input connected to the drain terminal (28) of the reference cell (27) and an output connected to the gate terminal (30) of the reference cell. The reference cell (27) therefore forms part of a negative feedback loop which maintains the overdrive voltages of the cell (2) to be read and the reference cell (27) constant, irrespective of temperature variations. The reading circuit (10) is also of high precision and has a high reading speed.

Abstract translation: 一种模拟读取电路（10），包括电流镜电路（19），将两个相同的电流强制进入待读取的单元（2）并进入参考单元（27）;以及运算放大器（31），其具有与 要读取的单元（2）的漏极端子（13），连接到参考单元（27）的漏极端子（28）的非反相输入端和连接到参考单元（20）的栅极端子（30）的输出端 。 因此，参考单元（27）形成负反馈回路的一部分，其保持要读取的单元（2）的过驱动电压和参考单元（27）恒定，而与温度变化无关。 读取电路（10）也具有高精度且读取速度高的特点。