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    Method for controlled erasing memory devices, in particular analog and multi-level flash-EEPROM devices
    1.
    发明公开
    Method for controlled erasing memory devices, in particular analog and multi-level flash-EEPROM devices 失效
    用于受控擦除存储器设备，尤其是模拟或值-闪速EEPROM阵列的方法

    公开(公告)号：EP0932161A1

    公开(公告)日：1999-07-28

    申请号：EP98830024.0

    申请日：1998-01-22

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pasotti, Marco ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Guaitini, Giovanni ,  Lhermet, Frank ,  Rolandi, Pierluigi

    IPC: G11C16/00 ,  G11C16/06

    CPC classification number: G11C16/3409 ,  G11C11/56 ,  G11C11/5621 ,  G11C11/5635 ,  G11C16/16 ,  G11C16/3404 ,  G11C16/3445 ,  G11C27/005

    Abstract: The controlled erase method includes supplying (40) at least one erase pulse to cells (3) of a memory array (2); comparing (53) the threshold voltage of the erased cells with a low threshold value; selectively soft-programming (62) the erased cells which have a threshold voltage lower than the low threshold value; and verifying (42) whether the erased cells have a threshold voltage lower than a high threshold value, which is higher than the low threshold value. If at least one predetermined number of erased cells has a threshold voltage which is higher than the high threshold value, an erase pulse is applied (44) to all the cells and the steps of comparing, selectively soft-programming and verifying are repeated.

    Abstract translation: 受控擦除方法包括提供（40）至少一个擦除脉冲到单元的存储器阵列的（3）（2）; 比较（53）所述擦除单元具有低阈值的阈值电压; 选择性地软编程（62）的擦除单元，其具有阈值电压低于低阈值低; 和验证（42）是否擦除单元具有阈值电压高于高阈值的情况下，所有这是比所述低阈值高。 如果擦除单元中的至少一个预定数量的具有阈值电压的所有比该高阈值时，以擦除脉冲施加（44）到所有的细胞和进行比较的步骤，选择性地软编程，并且重复验证。

    Method for parallel programming of nonvolatile memory devices, in particular flash memories and EEPROMs
    6.
    发明公开
    Method for parallel programming of nonvolatile memory devices, in particular flash memories and EEPROMs 失效
    对于中并行编程的非易失性存储设备，特别是闪存EEPROM的和方法

    公开(公告)号：EP0913835A1

    公开(公告)日：1999-05-06

    申请号：EP97830550.6

    申请日：1997-10-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Canegallo, Roberto ,  Chioffi, Ernestina ,  Pasotti, Marco ,  Gerna, Danilo ,  Rolandi, Pier Luigi

    IPC: G11C16/06

    CPC classification number: G11C16/3459 ,  G11C16/3454

    Abstract: The programming method comprises the steps of applying a programming pulse to a first cell (2) and simultaneously verifying the present threshold value of at least a second cell (2); then verifying the present threshold value of the first cell and simultaneously applying a programming pulse to the second cell. In practice, during the entire programming operation, the gate terminal of both the cells is biased to a same predetermined gate voltage (V PCX ) and the source terminal is connected to ground; the step of applying a programming pulse is carried out by biasing the drain terminal of the cell to a predetermined programming voltage (V P ) and the step OF verifying is carried out by biasing the drain terminal of the cell to a read voltage (V R ) different from the programming voltage. Thereby, switching between the step of applying a programming pulse and verifying is obtained simply by switching the drain voltage of the cells.

    Abstract translation: 该编程方法包括施加编程脉冲到第一小区（2），并同时验证至少一个第二小区（2）的本阈值的工序; 然后验证所述第一小区的当前阈值，并且同时施加编程脉冲到所述第二小区。 在实践中，整个编程操作期间，这两个单元的栅极端子被偏置到一个相同的栅极预定电压（VPCX）和源极端子连接到地; 施加编程脉冲的步骤是通过偏置单元的漏极端子至预定编程电压（VP）和检验步骤是通过偏置单元的漏极端子的读出电压（VR）不同开展开展 从编程电压。 由此，施加编程脉冲的步骤和验证之间的切换通过切换单元的漏极电压简单地获得。

    Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory
    8.
    发明公开
    Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory 失效
    韦尔法赫伦

    公开(公告)号：EP0913832A1

    公开(公告)日：1999-05-06

    申请号：EP97830566.2

    申请日：1997-11-03

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pasotti, Marco ,  Rolandi, Pier Luigi ,  Canegallo, Roberto ,  Gerna, Danilo ,  Chioffi, Ernestina

    IPC: G11C11/56 ,  G11C27/00

    CPC classification number: G11C11/5621 ,  G11C11/5628

    Abstract: The programming method comprises the steps of: a) determining (140) a current value (V eff ) of the threshold voltage (V th ); b) acquiring (100) a target value (V p ) of the threshold voltage; c) calculating (150) a first number of gate voltage pulses necessary to take the threshold voltage from the current value to the target value; d) applying (160) a second number (N2) of consecutive voltage pulses to the gate terminal of the cell, said second number being correlated to the first number and having a uniformly increasing amplitude; e) then measuring (170) a current value (V eff ) of the threshold voltage; and repeating steps c) to e) until a final threshold value is obtained.

    Abstract translation: 编程方法包括以下步骤：a）确定（140）阈值电压（Vth）的当前值（Veff）; b）获取（100）阈值电压的目标值（Vp）; c）计算（150）将阈值电压从当前值到目标值所需的第一数量的栅极电压脉冲; d）将连续电压脉冲的第二数量（N 2）施加到所述单元的所述栅极端子，所述第二数量与所述第一数量相关并具有均匀增加的幅度; e）然后测量（170）阈值电压的电流值（Veff）; 并重复步骤c）至e），直到获得最终阈值。

    Method and device for analog programming of flash EEPROM memory cells with autoverify
    9.
    发明公开
    Method and device for analog programming of flash EEPROM memory cells with autoverify 失效
    的方法及装置具有自检快闪EEPROM的存储单元的模拟编程

    公开(公告)号：EP0905712A1

    公开(公告)日：1999-03-31

    申请号：EP97830477.2

    申请日：1997-09-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pasotti, Marco ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Gerna, Danilo ,  Rolandi, Pier Luigi

    IPC: G11C27/00

    CPC classification number: G11C27/005

    Abstract: Device for analog programming comprising a current mirror circuit (19) connected to the drain terminals of a cell to be programmed (2) and of a MOS reference transistor (27); an operational amplifier (31) having inputs connected to the drain terminals (13) of the cell (2) and respectively of the MOS transistor (27) and output connected to the control terminal (30) of the MOS transistor. During programming, the control and drain terminals of the cell (2) are biased at corresponding programming voltages and the output voltage of the operational amplifier (31), which is correlated to the current threshold voltage level of the cell (2), is monitored and the programming is interrupted when this output voltage becomes at least equal to a reference voltage correlated to the threshold value desired for the cell.

    Abstract translation: 要被编程装置模拟编程包括连接到电池的漏极端的电流镜电路（19），（2）和一个MOS晶体管参考（27）的; 运算放大器（31）具有输入端连接到所述单元（2）和分别与MOS晶体管（27）和输出连接至所述MOS晶体管的控制端子（30）的漏极端子（13）。 在编程期间，所述细胞（2）的控制极和漏极端在相应的编程电压和运算放大器（31）的输出电压偏置，所有这一切都被关联到该单元的电流阈值电压电平（2）被监控 和编程中断当该输出电压变成至少等于相关期望该小区的阈值的参考电压。

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