公开(公告)号：WO1987002626A1

公开(公告)日：1987-05-07

申请号：PCT/US1986002254

申请日：1986-10-24

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  MATHUR, Vishnu ,  GARCIA, Socorro

IPC: B44C01/22

CPC classification number: G03F7/094 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802

Abstract: A method for forming multiple metallization layer (10, 24) on a semiconductor wafer (12) comprises applying insulating polyimide layers (16) between adjacent metallization layers. Vertical interconnect holes (22) are formed through the polyimide insulating layers (16) using a positive photoresist mask (18). The vertical interconnect holes (22) are etched using a fluorocarbon- or fluorosilicon-oxygen plasma under power and temperature conditions which provide for selectively etching the polyimide (16) relative to the photoresist (18). By initially forming the plasma etch at high power conditions which reduce the selectivity for the polyimide (16), the upper portion of the vertical interconnect hole walls may be flared to reduce problems with step metallization. The remaining portion of the plasma etch, however, is performed under conditions which are more highly selective for the polyimide which provides for better dimensional control and eliminates formation of a contaminating layer at the bottom of the vertical interconnect hole (20).