公开(公告)号：WO2007075727A3

公开(公告)日：2007-08-23

申请号：PCT/US2006048499

申请日：2006-12-20

Applicant: TESSERA INC ,  HABA BELGACEM ,  KANG TECK-GYU ,  MOHAMMED ILYAS ,  CHAU ELLIS

Inventor： HABA BELGACEM ,  KANG TECK-GYU ,  MOHAMMED ILYAS ,  CHAU ELLIS

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10

CPC classification number: H01L21/565 ,  G01R31/2886 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making a microelectronic assembly includes providing a microelectronic package having a substrate 400, a microelectronic element 410 overlying the substrate 400 and at least two conductive elements 418 projecting from a surface 402 of the substrate 400, the at least two conductive elements 418 having surfaces 434 remote from the surface 402 of the substrate 400. The method includes compressing the at least two conductive elements 418 so that the remote surfaces 434 thereof lie in a common plane, and after the compressing step, providing an encapsulant material 430 around the at least two conductive elements 418 for supporting the microelectronic package and so that the remote surfaces 434 of the at least two conductive elements 418 remain accessible at an exterior surface of the encapsulant material 430.

Abstract translation: 制造微电子组件的方法包括提供具有衬底400的微电子封装，覆盖衬底400的微电子元件410和从衬底400的表面402突出的至少两个导电元件418，所述至少两个导电元件418具有 表面434远离衬底400的表面402.该方法包括压缩至少两个导电元件418，使得它们的远端表面434位于公共平面中，并且在压缩步骤之后，围绕着该位置提供密封材料430 至少两个用于支撑微电子封装的导电元件418，并且使得至少两个导电元件418的远端表面434在密封剂材料430的外表面保持可访问。

公开(公告)号：WO2006020744A3

公开(公告)日：2006-06-08

申请号：PCT/US2005028492

申请日：2005-08-11

Applicant: TESSERA INC ,  HABA BELGACEM ,  BEROZ MASUD ,  URBISH GLENN ,  TUCKERMAN DAVID B

Inventor： HABA BELGACEM ,  BEROZ MASUD ,  URBISH GLENN ,  TUCKERMAN DAVID B

IPC: B81B7/00

CPC classification number: B81B7/007 ,  H03H3/02 ,  H03H9/0547 ,  H03H9/059 ,  H03H9/1057 ,  H03H9/1092

Abstract: As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern (26) is formed on a chip (8) insulated from wiring (11) of the chip, and a cap (42) is formed including a metal. The cap (42) is joined to the metal base pattern (26) on the chip to form the capped chip (48). In one embodiment, a front surface (9) of the chip is exposed which extends from a contact (14) or (16) of the chip to an edge (13) of the chip (8). In another embodiment, a conductive connection is formed to the contact (14) or (16), the conductive connection extending from the contact to a terminal (46) at an exposed plane (49) above the front surface (9) of the chip (8).

Abstract translation: 如本文所公开的，提供了用于形成加盖芯片的结构和方法。 如所公开的方法所示，在与芯片的布线（11）绝缘的芯片（8）上形成金属基底图案（26），并且形成包括金属的帽（42）。 帽（42）连接到芯片上的金属基底图案（26）以形成封盖芯片（48）。 在一个实施例中，芯片的前表面（9）暴露，其从芯片的接触件（14）或（16）延伸到芯片（8）的边缘（13）。 在另一个实施例中，导电连接形成于接触件（14）或（16），导电连接件在芯片的前表面（9）上方的暴露平面（49）处从接触件延伸到端子（46） （8）。

公开(公告)号：WO2005086532A3

公开(公告)日：2006-01-26

申请号：PCT/US2005006565

申请日：2005-03-01

Applicant: TESSERA INC ,  HUMPSTON GILES ,  OSBORN PHILIP R ,  THOMPSON JESSE BURL ,  KUBOTA YOICHI ,  TSENG CHUNG-CHUAN ,  BURTZLAFF ROBERT ,  HABA BELGACEM ,  TUCKERMAN DAVID B ,  WARNER MICHAEL

Inventor： HUMPSTON GILES ,  OSBORN PHILIP R ,  THOMPSON JESSE BURL ,  KUBOTA YOICHI ,  TSENG CHUNG-CHUAN ,  BURTZLAFF ROBERT ,  HABA BELGACEM ,  TUCKERMAN DAVID B ,  WARNER MICHAEL

IPC: B81B7/00 ,  H01L23/495 ,  H04R19/00 ,  H04R19/04

CPC classification number: B81B7/0077 ,  B81B2201/0257 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/10155 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/19041 ,  H01L2924/3025 ,  H04R19/005 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed to one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chop and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads. The metal layer further includes a first opening for passage of the at least one of acoustic energy and electromagnetic energy in a direction of at least one of the said device and from said device.

Abstract translation: 本文公开了封装芯片的各种实施例及其制造方法。 本文公开的一种这样的封装芯片包括具有前表面，与正面相对的后表面的芯片和在前表面和后表面中的一个处的器件，该器件可操作为声能和电磁能中的至少一个的换能器 并且所述芯片包括暴露于所述前表面和后表面中的一个的多个接合焊盘。 封装芯片包括具有介电元件和设置在电介质元件上的金属层的封装元件，封装元件具有面向斩波的内表面和背离芯片的外表面。 金属层包括暴露在内表面和外表面中的至少一个的多个触点，触点导电地连接到接合焊盘。 金属层还包括第一开口，用于沿着所述装置和所述装置中的至少一个的方向通过声能和电磁能中的至少一个。

公开(公告)号：WO2013019541A4

公开(公告)日：2013-05-30

申请号：PCT/US2012048288

申请日：2012-07-26

Applicant: TESSERA INC ,  MOHAMMED ILYAS ,  HABA BELGACEM ,  UZOH CYPRIAN

Inventor： MOHAMMED ILYAS ,  HABA BELGACEM ,  UZOH CYPRIAN

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L2224/10135 ,  H01L2924/07811 ,  H01L2924/00

Abstract: A component 10 can include a substrate 20 having a front surface 22 and a rear surface 21 remote therefrom, an opening 30 extending from the rear surface towards the front surface, and a conductive via 40 extending within the opening. The substrate 20 can have a CTE less than 10 ppm/°C. The opening 30 can define an inner surface 31 between the front and rear surfaces 22, 21. The conductive via 40 can include a first metal layer 41 overlying the inner surface 31 and a second metal region 42 overlying the first metal layer and electrically coupled to the first metal layer. The second metal region 42 can have a CTE greater than a CTE of the first metal layer 41. The conductive via 40 can have an effective CTE across a diameter D of the conductive via that is less than 80% of the CTE of the second metal region 42.

Abstract translation: 部件10可以包括具有前表面22和远离其的后表面21的基板20，从后表面朝向前表面延伸的开口30以及在开口内延伸的导电通孔40。 基板20可以具有小于10ppm /℃的CTE。 开口30可以在前表面22和后表面21之间限定内表面31.导电通孔40可以包括覆盖在内表面31上的第一金属层41和覆盖第一金属层的第二金属区域42，并且电耦合到 第一个金属层。 第二金属区域42可以具有大于第一金属层41的CTE的CTE。导电通孔40可以具有穿过导电通孔的直径D的有效CTE，其小于第二金属的CTE的80％ 区域42。

公开(公告)号：WO2013019541A3

公开(公告)日：2013-04-18

申请号：PCT/US2012048288

申请日：2012-07-26

Applicant: TESSERA INC ,  MOHAMMED ILYAS ,  HABA BELGACEM ,  UZOH CYPRIAN

Inventor： MOHAMMED ILYAS ,  HABA BELGACEM ,  UZOH CYPRIAN

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L2224/10135 ,  H01L2924/07811 ,  H01L2924/00

Abstract: A component 10 can include a substrate 20 having a front surface 22 and a rear surface 21 remote therefrom, an opening 30 extending from the rear surface towards the front surface, and a conductive via 40 extending within the opening. The substrate 20 can have a CTE less than 10 ppm/°C. The opening 30 can define an inner surface 31 between the front and rear surfaces 22, 21. The conductive via 40 can include a first metal layer 41 overlying the inner surface 31 and a second metal region 42 overlying the first metal layer and electrically coupled to the first metal layer. The second metal region 42 can have a CTE greater than a CTE of the first metal layer 41. The conductive via 40 can have an effective CTE across a diameter D of the conductive via that is less than 80% of the CTE of the second metal region 42.

Abstract translation: 部件10可以包括具有远离其的前表面22和后表面21的基板20，从后表面向前表面延伸的开口30以及在开口内延伸的导电通孔40。 衬底20可具有小于10ppm /℃的CTE。 开口30可以在前表面22和后表面21之间限定内表面31.导电通孔40可以包括覆盖内表面31的第一金属层41和覆盖第一金属层的第二金属区域42， 第一金属层。 第二金属区域42可以具有大于第一金属层41的CTE的CTE。导电通孔40可以在导电通孔的直径D上具有小于第二金属的CTE的80％的有效CTE 区域42。

公开(公告)号：WO2013009741A9

公开(公告)日：2013-03-07

申请号：PCT/US2012046049

申请日：2012-07-10

Applicant: TESSERA INC ,  CRISP RICHARD DEWITT ,  HABA BELGACEM ,  ZOHNI WAEL

Inventor： CRISP RICHARD DEWITT ,  HABA BELGACEM ,  ZOHNI WAEL

IPC: H01L25/065 ,  G11C5/06

CPC classification number: H01L23/48 ,  G11C5/06 ,  H01L23/3128 ,  H01L24/06 ,  H01L24/13 ,  H01L24/29 ,  H01L24/48 ,  H01L24/50 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48011 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73203 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1203 ,  H01L2924/1205 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package (10) may have a plurality of terminals (36) disposed at a face (32) thereof which are configured for connection to at least one external component, e.g., a circuit panel (70). First and second microelectronic elements (12), (14) can be affixed with packaging structure (30) therein. A first electrical connection (51A, 40A, 74A) can extend from a respective terminal (36A) of the package (10) to a corresponding contact (20A) on the first microelectronic element (12), and a second electrical connection (53A, 40B, 52A) can extend from the respective terminal (36A) to a corresponding contact (26A) on the second microelectronic element (14), the first and second connections being configured such that a respective signal carried by the first and second connections is subject to propagation delay of the same duration between the respective terminal (36A) and each of the corresponding contacts (20A, 26A) coupled thereto.

Abstract translation: 微电子封装（10）可以具有设置在其面（32）处的多个端子（36），其被配置为连接到至少一个外部部件，例如电路板（70）。 第一和第二微电子元件（12），（14）可以在其中固定有包装结构（30）。 第一电连接（51A，40A，74A）可以从封装（10）的相应端子（36A）延伸到第一微电子元件（12）上的对应触点（20A），并且第二电连接（53A， 40B，52A）可以从相应的端子（36A）延伸到第二微电子元件（14）上的相应的触点（26A），第一和第二连接被配置为使得由第一和第二连接承载的相应信号是对象 在相应的端子（36A）和与其耦合的相应的触点（20A，26A）中的每一个之间具有相同持续时间的传播延迟。

公开(公告)号：WO2012061199A3

公开(公告)日：2012-06-28

申请号：PCT/US2011058080

申请日：2011-10-27

Applicant: TESSERA INC ,  HABA BELGACEM ,  MOHAMMED ILYAS ,  CHAU ELLIS ,  LEE SANG II ,  DESAI KISHOR

Inventor： HABA BELGACEM ,  MOHAMMED ILYAS ,  CHAU ELLIS ,  LEE SANG II ,  DESAI KISHOR

IPC: H01L21/56

CPC classification number: H01L23/49811 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/1601 ,  H01L2224/1605 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/8349 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for making a microelectronic assembly includes providing a microelectronic element 30 with first conductive elements and a dielectric element 50 with second conductive elements. At least some of either the first conductive elements or the second conductive elements may be conductive posts 40 and other of the first or second conductive elements may include a bond metal 10 disposed between some of the conductive posts 40. An underfill layer 60 may overly some of the first or second conductive elements. At least one of the first conductive elements may be moved towards the other of the second conductive elements so that the posts pierce the underfill layer 60 and at least deform the bond metal 10. The microelectronic element 30 and the dielectric element 50 can be heated to join them together. The height of the posts 40 above the surface may be at least forty percent of a distance between surfaces of the microelectronic element 30 and dielectric element 50.

Abstract translation: 制造微电子组件的方法包括：将微电子元件30提供有第一导电元件和具有第二导电元件的电介质元件50。 第一导电元件或第二导电元件中的至少一些可以是导电柱40，并且第一或第二导电元件中的另一个可以包括设置在一些导电柱40之间的接合金属10.底部填充层60可能过度一些 的第一或第二导电元件。 第一导电元件中的至少一个可以朝向第二导电元件中的另一个移动，使得支柱刺穿底部填充层60并且至少使接合金属10变形。微电子元件30和电介质元件50可被加热到 一起加入 表面上方的柱40的高度可以是微电子元件30和电介质元件50的表面之间的距离的至少40％。

公开(公告)号：WO2010105152A3

公开(公告)日：2011-10-27

申请号：PCT/US2010027135

申请日：2010-03-12

Applicant: TESSERA INC ,  HABA BELGACEM ,  MARCUCCI BRIAN

Inventor： HABA BELGACEM ,  MARCUCCI BRIAN

IPC: H01L23/49 ,  H01L23/66

CPC classification number: B81B7/0006 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2223/6611 ,  H01L2224/06136 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/4809 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/49052 ,  H01L2224/49174 ,  H01L2224/49176 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1579 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00011 ,  H01L2224/4554

Abstract: A microelectronic assembly can include a microelectronic device, e.g., semiconductor chip (910), connected together with an interconnection element (930), e.g., substrate, the latter having signal contacts (990) and reference contacts (980). The reference contacts can be connectable to a source of reference potential such as ground or a voltage source other than ground such as a voltage source used for power. Signal conductors, e.g., signal wirebonds (965) can be connected to device contacts (912) exposed at a surface of the microelectronic device (910). Reference conductors, e.g., reference wirebonds (975) can be provided, at least one of which can be connected with two reference contacts (980) of the interconnection element (930). The reference wirebond (975) can have a run which extends at an at least substantially uniform spacing from a signal conductor, e.g., signal wirebond (965) that is connected to the microelectronic device over at least a substantial portion of the length of the signal conductor. In such manner a desired impedance may be achieved for the signal conductor.

Abstract translation: 微电子组件可以包括与互连元件（930）例如衬底连接在一起的微电子器件，例如半导体芯片（910），衬底具有信号触点（990）和参考触点（980）。 参考触点可以连接到参考电位源，例如接地或除接地之外的电压源，例如用于电源的电压源。 诸如信号引线键（965）的信号导体可以连接到暴露在微电子器件（910）的表面处的器件触点（912）。 可以提供参考导体，例如参考导线键（975），其中的至少一个可以与互连元件（930）的两个参考触点（980）连接。 参考引线键（975）可以​​具有以与信号导体至少基本均匀的间隔延伸的行程，例如在信号长度的至少大部分上连接到微电子器件的信号引线键（965） 导体。 以这种方式，可以为信号导体实现期望的阻抗。

公开(公告)号：WO2010005592A8

公开(公告)日：2011-02-10

申请号：PCT/US2009004033

申请日：2009-07-08

Applicant: TESSERA INC ,  RYU CHANG MYUNG ,  ENDO KIMITAKA ,  HABA BELGACEM ,  KUBOTA YOICHI

Inventor： RYU CHANG MYUNG ,  ENDO KIMITAKA ,  HABA BELGACEM ,  KUBOTA YOICHI

IPC: H01L23/498 ,  H01L21/48

CPC classification number: B81B7/0006 ,  B81C1/00539 ,  C25D7/00 ,  H01L21/4846 ,  H01L21/768 ,  H01L23/498 ,  H01L24/19 ,  H01L24/24 ,  H01L2224/244 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A microelectronic interconnect element can include a plurality of first metal lines (110) and plurality of second metal lines (110') interleaved with the first metal lines (110). Each of the first and second metal lines has a surface (122), (120') extending within the same reference plane. The first metal lines (110) have surfaces (120) above the reference plane and remote therefrom and the second metal lines (110') have surfaces (122') below the reference plane and remote therefrom. A dielectric layer (114A) can separate a metal line of the first metal lines from an adjacent metal line of the second metal lines.

Abstract translation: 微电子互连元件可以包括与第一金属线（110）交错的多个第一金属线（110）和多个第二金属线（110'）。 第一和第二金属线中的每一个具有在同一参考平面内延伸的表面（122），（120'）。 第一金属线（110）在参考平面上方具有远离其的表面（120），并且第二金属线（110'）在参考平面下方具有远离其的表面（122'）。 电介质层（114A）可以将第一金属线的金属线与第二金属线的相邻金属线分开。

公开(公告)号：WO2010005592A2

公开(公告)日：2010-01-14

申请号：PCT/US2009004033

申请日：2009-07-08

Applicant: TESSERA INC ,  RYU CHANG MYUNG ,  ENDO KIMITAKA ,  HABA BELGACEM ,  KUBOTA YOICHI

Inventor： RYU CHANG MYUNG ,  ENDO KIMITAKA ,  HABA BELGACEM ,  KUBOTA YOICHI

IPC: H01L23/498

CPC classification number: B81B7/0006 ,  B81C1/00539 ,  C25D7/00 ,  H01L21/4846 ,  H01L21/768 ,  H01L23/498 ,  H01L24/19 ,  H01L24/24 ,  H01L2224/244 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A microelectronic interconnect element can include a plurality of first metal lines (110) and plurality of second metal lines (110') interleaved with the first metal lines (110). Each of the first and second metal lines has a surface (122), (120') extending within the same reference plane. The first metal lines (110) have surfaces (120) above the reference plane and remote therefrom and the second metal lines (110') have surfaces (122') below the reference plane and remote therefrom. A dielectric layer (114A) can separate a metal line of the first metal lines from an adjacent metal line of the second metal lines.

Abstract translation: 微电子互连元件可以包括与第一金属线（110）交错的多个第一金属线（110）和多个第二金属线（110'）。 第一和第二金属线中的每一个具有在同一参考平面内延伸的表面（122），（120'）。 第一金属线（110）具有位于参考平面之上并远离其的表面（120），并且第二金属线（110'）具有在参考平面之下并远离其的表面（122'）。 介电层（114A）可将第一金属线的金属线与第二金属线的相邻金属线分隔开。