公开(公告)号：US20150325532A1

公开(公告)日：2015-11-12

申请号：US14803128

申请日：2015-07-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Fang Hong ,  Po-Chao Tsao

IPC: H01L23/00 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L23/562 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/0692 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785 ,  H01L29/7851 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor integrated device includes a substrate having an active region defined thereon, a plurality of active fins positioned in the active region, and a plurality of first protecting fins surrounding the active region. Each of the plurality of active fins extends along a first direction and includes a first length along the first direction. The plurality of first protecting fins extend along the first direction. One of the plurality of first protecting fins immediately adjacent to the active region has a second length along the first direction, and the second length is longer than the first length.

Abstract translation: 半导体集成器件包括具有限定在其上的有源区的衬底，位于有源区中的多个有源鳍，和围绕有源区的多个第一保护鳍。 多个活动翅片中的每一个沿着第一方向延伸并且包括沿着第一方向的第一长度。 多个第一保护翅片沿第一方向延伸。 紧邻有源区域的多个第一保护片之一具有沿第一方向的第二长度，第二长度比第一长度长。

公开(公告)号：US20150179770A1

公开(公告)日：2015-06-25

申请号：US14630666

申请日：2015-02-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Fang Hong ,  Po-Chao Tsao

IPC: H01L29/66

CPC classification number: H01L29/66795 ,  H01L27/0886 ,  H01L29/6653

Abstract: A fabrication method of a semiconductor device includes the following steps. First, sacrificial patterns are formed on a substrate and a space is formed on the sidewalls of each sacrificial pattern. Then, the sacrificial patterns are removed and patterns of the spacers are transferred into the substrate to form a fin structure. The fin structure includes a horizontal fin structure extending along a first direction and a vertical fin structure extending along a second direction. Subsequently, a gate structure, source/drain structures, and an electrical connecting structure are formed sequentially on the substrate. The gate structure overlaps portions of the horizontal fin structure. The source/drain structures are respectively on each side of the gate structure. The electrical connecting structure directly covers the horizontal fin structure and the vertical fin structure.

Abstract translation: 半导体器件的制造方法包括以下步骤。 首先，牺牲图案形成在基板上，并且在每个牺牲图案的侧壁上形成空间。 然后，去除牺牲图案，并将间隔物的图案转移到基板中以形成翅片结构。 翅片结构包括沿着第一方向延伸的水平翅片结构和沿着第二方向延伸的垂直翅片结构。 随后，在衬底上依次形成栅极结构，源极/漏极结构和电连接结构。 门结构与水平翅片结构的部分重叠。 源极/漏极结构分别位于栅极结构的每一侧。 电连接结构直接覆盖水平翅片结构和垂直翅片结构。

公开(公告)号：US20140367780A1

公开(公告)日：2014-12-18

申请号：US13920093

申请日：2013-06-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Fang Hong ,  Po-Chao Tsao

IPC: H01L29/78

CPC classification number: H01L23/562 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/0692 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785 ,  H01L29/7851 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor integrated device includes a substrate, a plurality of active fins, and a plurality of first protecting fins. The substrate includes an active region, and the active fins are positioned in the active region. The active region is surrounded by the first protecting fins. The active fins and the first protecting fins all extend along a first direction.

Abstract translation: 半导体集成器件包括衬底，多个有源鳍片和多个第一保护鳍片。 衬底包括有源区，活性鳍位于有源区中。 有源区被第一保护鳍包围。 活动鳍片和第一保护翼片沿着第一方向全部延伸。

公开(公告)号：US20200273758A1

公开(公告)日：2020-08-27

申请号：US16872395

申请日：2020-05-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Wei Feng ,  Shih-Hung Tsai ,  Chao-Hung Lin ,  Hon-Huei Liu ,  Shih-Fang Hong ,  Jyh-Shyang Jenq

IPC: H01L21/8238 ,  H01L21/225 ,  H01L21/324 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region, wherein each of the first fin-shaped structure and the second fin-shaped structure comprises a top portion and a bottom portion; a first doped layer around the bottom portion of the first fin-shaped structure; a second doped layer around the bottom portion of the second fin-shaped structure; a first liner on the first doped layer; and a second liner on the second doped layer.

公开(公告)号：US09881831B2

公开(公告)日：2018-01-30

申请号：US15465606

申请日：2017-03-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yi Chiu ,  Shih-Fang Hong ,  Chao-Hung Lin

IPC: H01L21/762 ,  H01L21/02 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L29/161

CPC classification number: H01L29/7851 ,  H01L21/02532 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure is disposed on the silicon substrate and includes a silicon germanium (SiGe) layer extending from bottom to top in the fin shaped structure. The shallow trench isolation covers a bottom portion of the fin shaped structure.

公开(公告)号：US20170271197A1

公开(公告)日：2017-09-21

申请号：US15610574

申请日：2017-05-31

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Wei Feng ,  Shih-Hung Tsai ,  Chao-Hung Lin ,  Shih-Fang Hong ,  Jyh-Shyang Jenq

IPC: H01L21/762 ,  H01L27/092 ,  H01L21/8238 ,  H01L27/11

CPC classification number: H01L21/76229 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1104

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a plurality of spacers on the first region, the second region, and the third region; forming a first patterned mask to cover the spacers on the first region and the second region; and removing the spacers on the third region.

公开(公告)号：US20170092737A1

公开(公告)日：2017-03-30

申请号：US15378015

申请日：2016-12-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Wei Feng ,  Shih-Hung Tsai ,  Shih-Fang Hong ,  Chao-Hung Lin ,  Jyh-Shyang Jenq

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/308

CPC classification number: H01L21/02603 ,  H01L21/823807 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78696

Abstract: A method for manufacturing a nanowire transistor device includes the following steps: A substrate is provided, and the substrate includes a plurality of nanowires suspended thereon. Each of the nanowires includes a first semiconductor core. Next, a first selective epitaxial growth process is performed to form second semiconductor cores respectively surrounding the first semiconductor cores. The second semiconductor cores are spaced apart from the substrate. After forming the second semiconductor core, a gate is formed on the substrate.

公开(公告)号：US20170047447A1

公开(公告)日：2017-02-16

申请号：US14855390

申请日：2015-09-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yi Chiu ,  Shih-Fang Hong ,  Chao-Hung Lin

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/161 ,  H01L29/165 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/7851 ,  H01L21/02532 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure is disposed on the silicon substrate and includes a silicon germanium (SiGe) layer extending downwardly from a top end and at least occupying 80% to 90% of the fin shaped structure. The shallow trench isolation covers a bottom portion of the fin shaped structure.

Abstract translation: 半导体器件及其制造方法，半导体器件包括硅衬底，鳍状结构和浅沟槽隔离。 鳍状结构设置在硅衬底上，并且包括从顶端向下延伸并且至少占据鳍形结构的80％至90％的硅锗（SiGe）层。 浅沟槽隔离覆盖鳍状结构的底部。

公开(公告)号：US20170005102A1

公开(公告)日：2017-01-05

申请号：US14816081

申请日：2015-08-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Wei Feng ,  Shih-Hung Tsai ,  Chao-Hung Lin ,  Shih-Fang Hong ,  Jyh-Shyang Jenq

IPC: H01L27/11 ,  H01L21/8238 ,  H01L21/762 ,  H01L27/092

CPC classification number: H01L21/76229 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1104

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a plurality of spacers on the first region, the second region, and the third region; forming a first patterned mask to cover the spacers on the first region and the second region; and removing the spacers on the third region.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供具有第一区域，第二区域和第三区域的衬底; 在所述第一区域，所述第二区域和所述第三区域上形成多个间隔物; 形成第一图案化掩模以覆盖第一区域和第二区域上的间隔物; 并移除第三区域上的间隔物。

公开(公告)号：US20160218179A1

公开(公告)日：2016-07-28

申请号：US14634904

申请日：2015-03-02

Applicant: United Microelectronics Corp.

Inventor： Li-Wei Feng ,  Shih-Hung Tsai ,  Shih-Fang Hong ,  Chao-Hung Lin ,  Jyh-Shyang Jenq

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/165 ,  H01L21/02

CPC classification number: H01L21/02603 ,  H01L21/823807 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78696

Abstract: A nanowire transistor device includes a substrate, a plurality of nanowires formed on the substrate, and a gate surrounding at least a portion of each nanowire. The nanowires respectively include a first semiconductor core and a second semiconductor core surrounding the first semiconductor core. A lattice constant of the second semiconductor core is different from a lattice constant of the first semiconductor core.

Abstract translation: 纳米线晶体管器件包括衬底，形成在衬底上的多个纳米线和围绕每个纳米线的至少一部分的栅极。 纳米线分别包括第一半导体芯和围绕第一半导体芯的第二半导体芯。 第二半导体芯的晶格常数与第一半导体芯的晶格常数不同。