METHODS AND SYSTEMS FOR DYNAMIC SPEED CHANGE ON HIGH SPEED INTERCONNECTS
    31.
    发明申请
    METHODS AND SYSTEMS FOR DYNAMIC SPEED CHANGE ON HIGH SPEED INTERCONNECTS 审中-公开
    高速互联动态速度变化的方法与系统

    公开(公告)号:WO2013186034A1

    公开(公告)日:2013-12-19

    申请号:PCT/EP2013/060849

    申请日:2013-05-27

    Applicant: ST-ERICSSON SA

    Abstract: Methods of changing a data rate of communication over an interface between a data transmitter and a data receiver are disclosed, wherein the data transmitter is associated with a first processor and transmitting data over the interface and the data receiver is associated with a second processor. The data transmitter transmits and the data receiver receives data over the interface at a first data rate. At the first processor, it is determined to change the first data rate to a second data rate. The data transmitter transmits and the data receiver receives a request to change the first data rate to the second data rate. In response thereto, a response message is transmitted by the data receiver and received by the data transmitter. When the response message comprises an acknowledgement to change the first data rate to the second data rate, the data transmitter transmits and the data receiver receives data over the interface at the second data rate. Corresponding protocol, electronic circuit and electronic device are also enclosed.

    Abstract translation: 公开了通过数据发送器和数据接收器之间的接口改变通信数据速率的方法,其中数据发送器与第一处理器相关联,并且通过接口发送数据,并且数据接收器与第二处理器相关联。 数据发射机发送并且数据接收器以第一数据速率通过接口接收数据。 在第一处理器处,确定将第一数据速率改变为第二数据速率。 数据发射机发送并且数据接收机接收将第一数据速率改变为第二数据速率的请求。 响应于此,响应消息由数据接收器发送并由数据发送器接收。 当响应消息包括将第一数据速率改变为第二数据速率的确认时,数据发射机发送并且数据接收器以第二数据速率通过接口接收数据。 相应的协议,电子电路和电子设备也被封闭。

    METHODS FOR HANDLING AN IP DUAL-STACK CONNECTION
    32.
    发明申请
    METHODS FOR HANDLING AN IP DUAL-STACK CONNECTION 审中-公开
    用于处理IP双层连接的方法

    公开(公告)号:WO2013026613A3

    公开(公告)日:2013-11-14

    申请号:PCT/EP2012063415

    申请日:2012-07-09

    CPC classification number: H04L69/167 H04L69/161 H04W80/045

    Abstract: In a mobile device operative in a packet switched wireless network, the control logic for handling the PS connection resides inside the modem part of the device when dual-stack operation is required (e.g., PDN connections having PDN types IPv4 and IPv6). This effectively hides how dual-stack IPv4v6 connectivity is implemented towards the relevant 3GPP network. Further, the modem always only uses one and only one network interface, as seen from the IP stack, when it operates in dual-stack mode, regardless of how the underlying PDN connection(s) are set up.

    Abstract translation: 在分组交换无线网络中操作的移动设备中,当需要双栈操作(例如,具有PDN类型IPv4和IPv6的PDN连接)时,用于处理PS连接的控制逻辑驻留在设备的调制解调器部分内。 这有效地隐藏了如何将双栈IPv4v6连接实现到相关的3GPP网络。 此外,无论底层的PDN连接如何设置,调制解调器总是只使用一个且仅一个网络接口,如IP堆栈所示,当它以双模式运行时。

    A SERVICE PROVIDER NODE, A METHOD THEREIN, AND A COMPUTER PROGRAM PRODUCT
    33.
    发明申请
    A SERVICE PROVIDER NODE, A METHOD THEREIN, AND A COMPUTER PROGRAM PRODUCT 审中-公开
    服务提供商节点,其方法和计算机程序产品

    公开(公告)号:WO2013164215A1

    公开(公告)日:2013-11-07

    申请号:PCT/EP2013/058278

    申请日:2013-04-22

    Applicant: ST-ERICSSON SA

    CPC classification number: H04L12/1453 G06Q30/06 H04L12/1414 H04L12/1435

    Abstract: A service provider node (101), and a method therein, for transmitting data packets relating to parts of a service to a communication device (102). The service provider node and the communication device arecommunicatively connected over a communications network (104) and comprised in a communications system (100). The method comprises receiving (205, 302) a signal (S1), which signal comprises an identifier of the communication device requesting a service, an identifier of the requested service, and an agreement comprising information about a previously agreed part of the service. The method comprises further agreeing (303) on an upcoming part of the service requested by the communication device, while transmitting (206, 304) data packets relating to thepreviously agreed part of the service to the communication device, wherein the data packets are transmitted in dependence of the received signal.

    Abstract translation: 一种服务提供商节点(101)及其方法,用于将与服务的一部分相关的数据分组发送到通信设备(102)。 服务提供商节点和通信设备通过通信网络(104)通信地连接并且包括在通信系统(100)中。 该方法包括:接收(205,302)信号(S1),该信号包括请求服务的通信设备的标识符,所请求的服务的标识符以及包含关于先前约定的部分服务的信息的协议。 所述方法还包括:对所述通信设备所请求的服务的即将到来的一部分进行进一步的同意(303),同时向所述通信设备发送(206,304)与所述业务的所述先前约定的部分相关的数据分组,其中,所述数据分组被发送 接收信号的依赖性。

    IQ MISMATCH COMPENSATION
    34.
    发明申请
    IQ MISMATCH COMPENSATION 审中-公开
    智商失调补偿

    公开(公告)号:WO2013153087A1

    公开(公告)日:2013-10-17

    申请号:PCT/EP2013/057445

    申请日:2013-04-10

    Applicant: ST-ERICSSON SA

    CPC classification number: H04L27/1525 H03D3/009 H04B1/123 H04L27/3863

    Abstract: A receiver (100) has an ln-phase path (l-path) (101) that delivers a digital l-path signal ϰ 1 (t) and a Quadrature path (Q-path) (103) that delivers a digital Q-path signal ϰ Q (t). The receiver (100) includes a compensation stage (124) arranged to compensate for gain error g and phase error φ between the digital l-path signal ϰ 1 (t) and the digital Q-path signal ϰ Q (t). The compensation stage (124) has a compensation coefficient generation stage (200), a compensation coefficient application stage (202), a gain control stage (208), a relative gradient generation stage (214) and a step parameter generation stage (224). Compensation coefficients W 1,1 , W 1,2 , W 2,1 , W 2,2 applied to the digital l-path signal ϰ 1 (t) and the digital Q-path signal ϰ Q (t) are generated by iteratively updating them using a relative gradient of the compensated digital in-phase signal γ 1 (t) and a compensated digital quadrature signal γ Q (t), and a step parameter μ n , the magnitude of which is adjusted based on a rate of change of the compensation coefficients W 1,1 , W 1,2 , W 2,1 , W 2,2 .

    Abstract translation: 接收器(100)具有传送数字l路径信号κ1(t)和正交路径(Q路径)(103)的ln相位路径(1路径)(101) 路径信号κQ(t)。 接收器(100)包括补偿级(124),其被配置为补偿数字l路径信号κ1(t)和数字Q路径信号κQ(t)之间的增益误差g和相位误差phi。 补偿级(124)具有补偿系数生成级(200),补偿系数应用级(202),增益控制级(208),相对梯度生成级(214)和步骤参数生成级(224) 。 通过对数字l路径信号κ1(t)和数字Q路径信号κQ(t)施加的补偿系数W1,1,W1,2,W2,1,W2,2通过使用 补偿的数字同相信号γ1(t)和补偿的数字正交信号γQ(t)的相对梯度,以及基于补偿系数的变化率来调整幅度的步长参数mu n W1,1,W1,2,W2,1,W2,2。

    NEIGHBORING CELL MEASUREMENTS
    35.
    发明申请
    NEIGHBORING CELL MEASUREMENTS 审中-公开
    相邻单元测量

    公开(公告)号:WO2013143870A1

    公开(公告)日:2013-10-03

    申请号:PCT/EP2013/055308

    申请日:2013-03-14

    Applicant: ST-ERICSSON SA

    CPC classification number: H04W36/0061 H04W36/0083 H04W36/18 H04W36/30

    Abstract: An arrangement (400) for a user equipment, UE, is disclosed. The arrangement (400) comprises an acquiring unit (401) configured to acquire neighboring cell information relating to a plurality of neighboring cells. An assignment unit (403) is provided to assign a priority indicator to each neighboring cell based on the neighboring cell information. Also, a measurement unit (404) is provided to perform measurements on the basis of the assigned priority indicators. The arrangement (400) is arranged such that measurements can be performed more frequently for a neighboring cell having a first priority indicator compared with another neighboring cell having a second priority indicator, which second priority indicator is comparatively lower than the first priority indicator. The disclosure also presents corresponding methods, computer program products and devices.

    Abstract translation: 公开了一种用于用户设备UE的装置(400)。 该装置(400)包括获取单元(401),其被配置为获取与多个相邻小区相关的相邻小区信息。 提供分配单元(403),用于基于相邻小区信息向每个相邻小区分配优先级指示符。 此外,提供测量单元(404)以基于分配的优先级指示符来执行测量。 布置(400)被布置为使得与具有第二优先级指示符的第二优先级指示符相比,具有第一优先级指示符的相邻小区与具有第二优先级指示符的相邻小区相比更频繁地进行测量。 本公开还提出了相应的方法,计算机程序产品和设备。

    A RECEIVER AND A METHOD THEREIN
    36.
    发明申请
    A RECEIVER AND A METHOD THEREIN 审中-公开
    接收者及其方法

    公开(公告)号:WO2013135651A1

    公开(公告)日:2013-09-19

    申请号:PCT/EP2013/054929

    申请日:2013-03-12

    Applicant: ST-ERICSSON SA

    Abstract: A receiver 10 and method in the receiver for cell search to find an actual base station having a carrier frequency in a radio communications network 1. The receiver detects a first signal representative of a base station 12,14,16,18 by performing slot synchronisation, frame synchronization, cell identification, measurement of a signal quality of the first signal and comparison of the measured signal quality with a first threshold value. When a first signal having a signal quality that is greater than the first threshold value has been detected, the receiver searches for at least one second signal representative of a base station for at least one frequency offset comprised in a set of offsets S3. Further, when one or more second signals are detected, the receiver selects the signal with the highest signal quality, and detects a broadcast radio channel representative of a base station for the selected signal.

    Abstract translation: 接收机10和用于小区搜索的接收机中的方法,以在无线电通信网络1中找到具有载波频率的实际基站。接收机通过执行时隙同步来检测代表基站12,14,16,18的第一信号 ,帧同步,小区识别,第一信号的信号质量的测量以及所测量的信号质量与第一阈值的比较。 当已经检测到具有大于第一阈值的信号质量的第一信号时,接收机针对包括在一组偏移量S3中的至少一个频率偏移量,搜索表示基站的至少一个第二信号。 此外,当检测到一个或多个第二信号时,接收机选择具有最高信号质量的信号,并且检测表示所选信号的基站的广播无线电信道。

    INTERPOLATION OF FILTER COEFFICIENTS
    37.
    发明申请
    INTERPOLATION OF FILTER COEFFICIENTS 审中-公开
    插值滤波器系数

    公开(公告)号:WO2013098342A3

    公开(公告)日:2013-08-22

    申请号:PCT/EP2012076974

    申请日:2012-12-27

    Applicant: ST ERICSSON SA

    CPC classification number: H04L27/12 H03H17/0294

    Abstract: The frequency response of a digital filter, such as a pre-emphasis filter in a signal transmitter having a phase-locked loop, is adjusted using interpolation of the filter coefficients, enabling sets of filter coefficients to be pre-computed or generated as needed in the transmitter. The phase error behavior of the digital filter can be significantly improved.

    Abstract translation: 数字滤波器(例如具有锁相环的信号发射器中的预加重滤波器)的频率响应使用滤波器系数的内插来调整,使得滤波器系数组能够根据需要预先计算或生成 发射机。 数字滤波器的相位误差行为可以得到显着改善。

    AUTOMATIC PARTIAL ARRAY SELF-REFRESH
    38.
    发明申请
    AUTOMATIC PARTIAL ARRAY SELF-REFRESH 审中-公开
    自动部分阵列自我修复

    公开(公告)号:WO2013110663A1

    公开(公告)日:2013-08-01

    申请号:PCT/EP2013/051247

    申请日:2013-01-23

    Applicant: ST-ERICSSON SA

    Abstract: Methods of configuring dynamic memory associated with a processing system, are described. The dynamic memory is configured in a plurality of blocks, the method comprises: a) receiving information relating to a utilisation status of the memory; b) processing the received information to determine at least one first block of the memory that is currently not in use for information storage; and c) configuring the at least one first block to be excluded from an information refresh process.

    Abstract translation: 描述了配置与处理系统相关联的动态存储器的方法。 动态存储器被配置在多个块中,该方法包括:a)接收与存储器的使用状态有关的信息; b)处理所接收的信息以确定当前不用于信息存储的存储器的至少一个第一块; 以及c)配置要从信息刷新处理中排除的所述至少一个第一块。

    SINGLE FEEDBACK LOOP FOR PARALLEL ARCHITECTURE BUCK CONVERTER–LDO REGULATOR
    39.
    发明申请
    SINGLE FEEDBACK LOOP FOR PARALLEL ARCHITECTURE BUCK CONVERTER–LDO REGULATOR 审中-公开
    单向反馈回路循环式转换器-LDO调节器

    公开(公告)号:WO2013098246A1

    公开(公告)日:2013-07-04

    申请号:PCT/EP2012/076686

    申请日:2012-12-21

    Applicant: ST-ERICSSON SA

    Inventor: MARTY, Nicolas

    CPC classification number: H02M3/158 H02M2001/0045

    Abstract: An embodiment of a voltage regulation circuit includes a DC-DC converter configured to control a first current provided from a source to a load via a first output, and a linear regulator configured to control a second current provided from the source to the load via a second output. The voltage regulation circuit further includes a single control loop configured to receive an output voltage across the load and a first reference voltage. The single control loop is further configured to generate a single error signal between the output voltage across the load and the first reference voltage and to control the DC-DC converter and the linear regulator using the single error signal such that when the single error signal is outside of a predetermined range the DC-DC converter provides the first current to the load and the linear regulator provides the second current to the load simultaneously.

    Abstract translation: 电压调节电路的实施例包括DC-DC转换器,其被配置为经由第一输出来控制从源极向负载提供的第一电流;以及线性调节器,其被配置为通过经由第一输出控制从源极向负载提供的第二电流 第二输出。 电压调节电路还包括被配置为接收负载两端的输出电压和第一参考电压的单个控制回路。 单个控制回路还被配置为在负载两端的输出电压和第一参考电压之间产生单个误差信号,并且使用单个误差信号来控制DC-DC转换器和线性稳压器,使得当单个误差信号为 在预定范围之外,DC-DC转换器向负载提供第一电流,并且线性调节器同时向负载提供第二电流。

    SIGNAL FILTERING
    40.
    发明申请
    SIGNAL FILTERING 审中-公开
    信号滤波

    公开(公告)号:WO2013098182A1

    公开(公告)日:2013-07-04

    申请号:PCT/EP2012/076344

    申请日:2012-12-20

    Applicant: ST-ERICSSON SA

    Inventor: KOLI, Kimmo

    CPC classification number: H04B15/00 H03H19/008 H04B1/40 H04W84/12

    Abstract: A signal filter (100) comprises a first transferred impedance filter, TIF, (TIF A ) having four differential signal paths (P A,1 , P A,2 , P A,3 , P A,4 ) and a second TIF (TIF B ) having four differential signal paths (P B,1 , P B,2 , P B,3 , P B,4 )- A first differential signal port of the first TIF (32 A ) is coupled to a first differential signal port of the second TIF (32 B ). A first clock generator (12 A ) is arranged to provide first-TIF clock signals (CLK A,I+ , CLK A,Q+ , CLK A,I- , CLK A,Q- ) having four non-overlapping phases for selecting the respective first-TIF differential signal paths (P A,1 , P A,2 , P A,3 , P A,4 ), and a second clock generator (12 B ) is arranged to provide second-TIF clock signals (CLK B,I+ , CLK B,Q+ , CLK B,J- , CLK B,Q- ) having four non-overlapping phases for selecting the respective second-TIF differential signal paths (P B,1 , P B,2 , P B,3 , P B,4 ). The phases of the second-TIF clock signals (CLK B,I+ , CLK B,Q+ , CLK B,I- , CLK B,Q- ) are equal to the phases of the first-TIF clock signals (CLK A,I+ , CLK A,Q+ , CLK A,I- , CLK A,Q- ) delayed by 45 degrees. The first-TIF first, second, third and fourth clock signals (CLK A,I+ , CLK A,Q+ , CLK A,I- , CLK A,Q- -) and the second-TIF first, second, third and fourth clock signals (CLK B,I+ , CLK B,Q+ , CLK B,I- , CLK B,Q- ) have a duty cycle in the range 16.75% to 25%.

    Abstract translation: 信号滤波器(100)包括具有四个差分信号路径(PA,1,PA,2,PA,3,PA,4)和具有四个差分信号的第二TIF(TIFB)的第一传输阻抗滤波器TIF(TIFA) 信号路径(PB,1,PB,2,PB,3,PB,4) - 第一TIF(32A)的第一差分信号端口耦合到第二TIF(32B)的第一差分信号端口。 第一时钟发生器(12A)被布置成提供具有四个非重叠相位的第一TIF时钟信号(CLKA,I +,CLKA,Q +,CLKA,I,CLKA,Q-),用于选择相应的第一TIF差分信号 路径(PA,1,PA,2,PA,3,PA,4)和第二时钟发生器(12B)被布置成提供第二TIF时钟信号(CLKB,I +,CLKB,Q +,CLKB,J-, CLKB,Q-)具有用于选择相应的第二TIF差分信号路径(PB,1,PB,2,PB,3,PB,4)的四个非重叠相位。 第二TIF时钟信号(CLKB,I +,CLKB,Q +,CLKB,I,CLKB,Q-)的相位等于第一TIF时钟信号(CLKA,I +,CLKA,Q +,CLKA ,I-,CLKA,Q-)延迟45度。 第一TIF第一,第二,第三和第四时钟信号(CLKA,I +,CLKA,Q +,CLKA,I,CLKA,Q--)和第二TIF第一,第二,第三和第四时钟信号(CLKB, I +,CLKB,Q +,CLKB,I,CLKB,Q-)的占空比在16.75%至25%的范围内。

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