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    Digital amplitude modulating circuitry
    31.
    发明公开
    Digital amplitude modulating circuitry 失效
    Schaltungsanordnung zur digitalen Amplitudenmodulation。

    公开(公告)号：EP0078857A1

    公开(公告)日：1983-05-18

    申请号：EP81109520.7

    申请日：1981-11-05

    Applicant: Hewlett-Packard Company

    Inventor： Kovalick, Al ,  Hassun, Rolly

    IPC: H04L27/04 ,  H03C1/00 ,  H03B21/02

    CPC classification number: H03C1/00 ,  H03B21/02 ,  H03B28/00 ,  H03B2201/0283 ,  H03C2200/0029 ,  H04L27/04

    Abstract: A digital circuitry is provided for modulating the amplitudes of sinusoidal carrier frequency signals in the phase domain. Thereto, a phase accumulator (2) delivers a digital phase signal in response to a carrier frequency signal to be modulated. A modulating phase signal is derived from an analog modulating signal by means of a A/D-converter (70), a ROM (60) containing phase data and a polarity generator (50). The phase signals from the phase accumulator (2) and from the polarity generator (50) are added, converted into sinusoidal amplitude signals and are converted into analog signals having phase modulated signal components with higher frequencies and amplitude modulated signal components with lower frequencies. A low-pass filter (120) delivers the desired analog amplitude modulated output signal.

    Abstract translation: 提供数字电路用于调制相位域中的正弦载波频率信号的振幅。 此外，相位累加器（2）响应于要调制的载波频率信号传送数字相位信号。 通过A / D转换器（70），包含相位数据的ROM（60）和极性发生器（50）从模拟调制信号导出调制相位信号。 来自相位累加器（2）和极性发生器（50）的相位信号被相加，被转换为正弦振幅信号，并被转换为具有较高频率的相位调制信号分量和具有较低频率的幅度调制信号分量的模拟信号。 低通滤波器（120）传送所需的模拟幅度调制输出信号。

    OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT
    33.
    发明申请
    OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT 有权
    振荡器，电子设备和移动对象

    公开(公告)号：US20160226447A1

    公开(公告)日：2016-08-04

    申请号：US15014283

    申请日：2016-02-03

    Applicant: Seiko Epson Corporation

    Inventor： Akihiro FUKUZAWA

    IPC: H03B5/32

    CPC classification number: H03B5/32 ,  H03B5/129 ,  H03B2200/0062 ,  H03B2201/0283 ,  H03B2201/038 ,  H03B2202/06

    Abstract: An oscillator includes an input terminal, an oscillation circuit section configured to cause a resonator to resonate to output an oscillator signal, a digital input section to which a signal for controlling an oscillation frequency of the oscillation circuit section is input via the input terminal, and a first bias circuit section including a constant current source configured to supply a reference current to the digital input section.

    Abstract translation: 振荡器包括输入端子，被配置为使谐振器谐振以输出振荡器信号的振荡电路部分，经由输入端子输入用于控制振荡电路部分的振荡频率的信号的数字输入部分;以及 第一偏置电路部分，包括被配置为向数字输入部分提供参考电流的恒流源。

    Split varactor array with improved matching and varactor switching scheme
    34.
    发明授权
    Split varactor array with improved matching and varactor switching scheme 有权
    具有改进的匹配和变容二极管切换方案的分裂变容二极管阵列

    公开(公告)号：US08779867B2

    公开(公告)日：2014-07-15

    申请号：US13281871

    申请日：2011-10-26

    Applicant: Edwin Thaller ,  Roberto Nonis

    Inventor： Edwin Thaller ,  Roberto Nonis

    IPC: H03B5/12

    CPC classification number: H03B5/124 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2201/0208 ,  H03B2201/0283 ,  H03J2200/10

    Abstract: One embodiment of the present invention relates to a digital controlled oscillator. The oscillator includes an oscillator circuit, a varactor array, and a control circuit. The oscillator circuit receives a control word and a signal and generates an oscillator clock signal from the signal at a frequency selected by the control word. The varactor array has a first array of varactor cells having incremental capacitance values and a second array of varactor cells having equal capacitance values. The split varactor array provides a capacitance value. A control circuit is coupled to the oscillator circuit and controls the split varactor array according to the control word. The control circuit sets varactor cells of the split varactor array on or off.

    Abstract translation: 本发明的一个实施例涉及数字控制振荡器。 振荡器包括振荡电路，变容二极管阵列和控制电路。 振荡器电路接收控制字和信号，并从控制字选择的频率的信号产生振荡器时钟信号。 变容二极管阵列具有具有增量电容值的变容二极管单元的第一阵列和具有相等电容值的变容二极管单元的第二阵列。 拆分变容二极管阵列提供电容值。 控制电路耦合到振荡器电路，并根据控制字控制分离变容二极管阵列。 控制电路设置分离变容二极管阵列的变容二极管电池。

    Method, system and apparatus for reducing oscillator frequency spiking during oscillator frequency adjustment
    35.
    发明授权
    Method, system and apparatus for reducing oscillator frequency spiking during oscillator frequency adjustment 有权
    在振荡器频率调整期间减少振荡器频率尖峰的方法，系统和装置

    公开(公告)号：US07432773B2

    公开(公告)日：2008-10-07

    申请号：US11531004

    申请日：2006-09-12

    Applicant: Vanitha Kuppusamy ,  Clark Rogers

    Inventor： Vanitha Kuppusamy ,  Clark Rogers

    IPC: H03L7/099

    CPC classification number: H03M1/0872 ,  H03B2200/0034 ,  H03B2200/0048 ,  H03B2201/0283 ,  H03L1/00 ,  H03M1/742

    Abstract: Current sources are selectively coupled to a current controlled frequency determining circuit of an oscillator. A buffer amplifier has an input coupled to the current controlled frequency determining circuit of the oscillator and the buffer amplifier output is selectively coupled to the current sources not coupled to the frequency determining circuit of the oscillator. The buffer amplifier output maintains substantially the voltage of the current controlled frequency determining circuit on each of the current sources not coupled to the frequency determining circuit so that when any current source is coupled thereto, there is substantially no voltage difference therebetween. This substantially prevents generation of undesirable frequency spikes during coupling of the current sources to the frequency determining circuit of the oscillator.

    Abstract translation: 电流源选择性地耦合到振荡器的电流控制频率确定电路。 缓冲放大器具有耦合到振荡器的电流控制频率确定电路的输入，并且缓冲放大器输出选择性地耦合到未耦合到振荡器的频率确定电路的电流源。 缓冲放大器输出基本上维持不耦合到频率确定电路的每个电流源上的电流控制频率确定电路的电压，使得当任何电流源耦合到其上时，它们之间基本上没有电压差。 这实质上防止了在将电流源耦合到振荡器的频率确定电路期间产生不期望的频率尖峰。

    Method and apparatus for calibrating a frequency adjustable oscillator in an integrated circuit device
    36.
    发明申请
    Method and apparatus for calibrating a frequency adjustable oscillator in an integrated circuit device 有权

    公开(公告)号：US20010020875A1

    公开(公告)日：2001-09-13

    申请号：US09824277

    申请日：2001-04-02

    Applicant: Silicon Wave, Inc.

    Inventor： Lars Gustaf Jansson

    IPC: H03B005/12 ,  H03L007/099

    CPC classification number: H03F3/45085 ,  H01L27/0805 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/124 ,  H03B5/1265 ,  H03B2201/0266 ,  H03B2201/0283 ,  H03F1/56 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18

    Abstract: A method and apparatus for digitally controlling the capacitance of an integrated circuit device using MOS-FET devices. In accordance with one aspect of the present invention, a one-bit or nullbinarynull varactor is presented wherein the gate-to-bulk capacitance of the MOS-FET device exhibits dependency to a D.C. voltage applied between its gate and well implant regions. The capacitance-voltage characteristic of the binary capacitor has three major regions: (1) a first relatively flat region having little or no voltage dependency and having a capacitance equal to a first low capacitance of C1; (2) a sloped region wherein a voltage dependency exists; and (3) a second relatively flat region where there is little or no voltage dependency and where the capacitance equals a second higher capacitance of C2. The capacitance of the binary capacitor can be changed from C1 to C2 simply by changing the polarity of the applied D.C. voltage from a positive to a negative value. A plurality of binary capacitors are configured in a parallel arrangement to produce a digitally controlled capacitor. The digitally controlled capacitor can be used in any integrated circuit requiring a tightly controlled tuned network. One application is a voltage-controlled oscillator (VCO) wherein the center output frequency of the VCO is calibrated by digitally modifying the capacitance of the VCO's digitally controlled capacitor. A means for determining whether the VCO requires calibration and a means for calibrating the center output frequency of the VCO is presented.

    Split Varactor Array with Improved Matching and Varactor Switching Scheme
    40.
    发明申请
    Split Varactor Array with Improved Matching and Varactor Switching Scheme 有权
    具有改进的匹配和变容二极管切换方案的分裂变容二极管阵列

    公开(公告)号：US20130107978A1

    公开(公告)日：2013-05-02

    申请号：US13281871

    申请日：2011-10-26

    Applicant: Edwin Thaller ,  Roberto Nonis

    Inventor： Edwin Thaller ,  Roberto Nonis

    IPC: H04L27/00 ,  H03L7/099 ,  H03B5/12

    CPC classification number: H03B5/124 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2201/0208 ,  H03B2201/0283 ,  H03J2200/10

    Abstract: One embodiment of the present invention relates to a digital controlled oscillator. The oscillator includes an oscillator circuit, a varactor array, and a control circuit. The oscillator circuit receives a control word and a signal and generates an oscillator clock signal from the signal at a frequency selected by the control word. The varactor array has a first array of varactor cells having incremental capacitance values and a second array of varactor cells having equal capacitance values. The split varactor array provides a capacitance value. A control circuit is coupled to the oscillator circuit and controls the split varactor array according to the control word. The control circuit sets varactor cells of the split varactor array on or off.

    Abstract translation: 本发明的一个实施例涉及数字控制振荡器。 振荡器包括振荡电路，变容二极管阵列和控制电路。 振荡器电路接收控制字和信号，并从控制字选择的频率的信号产生振荡器时钟信号。 变容二极管阵列具有具有增量电容值的变容二极管单元的第一阵列和具有相等电容值的变容二极管单元的第二阵列。 拆分变容二极管阵列提供电容值。 控制电路耦合到振荡器电路，并根据控制字控制分离变容二极管阵列。 控制电路设置分离变容二极管阵列的变容二极管电池。

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