Abstract:
L'enroulement principal (22a, 22b) d'un transformateur d'inductance (22) a perte elevee est couple a une source (19) de tension d'entree (Vp) de courant alternatif pour developper des tensions de sortie de polarite alternee dans des enroulements secondaires couples etroitement les uns aux autres, comprenant un enroulement de haute tension (22c) du transformateur. Plusieurs tensions d'alimentation en courant continu, comprenant la tension d'anode acceleratrice (30KV), sont derivees a partir des tensions de sortie de l'enroulement secondaire. Afin de reguler les tensions de sortie de l'enroulement secondaire, un circuit comprenant un condensateur (23) et une reactance saturable (21) est couple en tant que circuit de charge (20) a un (22F) des enroulements secondaires du transformateur. Lorsque la reactance saturable (21) est magnetiquement saturee pendant chaque demi-cycle de la tension de sortie a polarite alternee, un courant circulant (ic) est produit et s'ecoule entre la reactance saturable (21) et le condensateur (23). Afin d'ameliorer le rendement de l'alimentation de courant et de reduire l'augmentation de temperature a l'interieur du noyau magnetisable (121) de la reactance saturable (21), les parametres du transformateur (22) et du circuit de charge (20) sont selectionnes de maniere a produire un courant circulant possedant une amplitude relativement faible. Afin d'ameliorer la regulation de la tension de sortie lors de la production d'un courant circulant possedant une faible amplitude, on prevoit un enroulement d'attaque de compensation (22g) couple magnetiquement et etroitement au premier enroulement (22a, 22b) du transformateur a fuite elevee (22). L'enroulement d'attaque de compensation (22g) est couple en serie a l'enroulement (21a) de la reactance saturable au travers du condensateur (23) et est polarise par rapport a l'enroulement secondaire (22f) du transformateur couple par condensateur de maniere a s'opposer a la tendance de l'amplitude de la tension de sortie ou de la region volt-seconde de
Abstract:
Apparatus which is responsive to a video signal for producing a position-modulated pulse train which is representative of the occurrence of transitions of the video signal. A transversal filter (60) is responsive to the video signal and produces a differentiated replica of the video signal over a given band of frequencies. The output of the transversal filter contains transitional information of the video signal occupying a range of frequencies which is to be analyzed. Information representing transitions of positive, negative, or both polarities is then compared to a given threshold value, generated in threshold generator (82). Signal transitions exceeding the threshold are converted to pulses, thereby producing a train of pulses representing significant transitions of a desired polarity or polarities. The times of occurrence of the pulses are then analyzed to generate a control signal for controlling a given characteristic of the video signal during processing.
Abstract:
Two or more CCD imagers (12, 14), which have random defects are optically coupled to form a single image. The CCD's are in registry. Because of the random nature of the location of the defects, the defective photosensors of one imager (12) are aligned with good photosensors of another (14). Memories (34, 36) keep track of which locations of which CCD are defective. The imagers (12, 14) are operated synchronously and the signals from good photosensor locations are summed for improved signal-to-noise ratio. When a location is addressed at which one imager (12) has a defective photosensor, the respective memory (34) decouples it from the good photosensor of the other imager (14). The signal level is restored for that location by increasing the gain of a preamp (46) by the correct amount. If the imagers (12, 14) are made from the same mask, they may have almost identically corresponding defective photosensors. Then one imager (12) is mounted upside-down relative to the other (14) and scanned backwards so the defects do not coincide.
Abstract:
A system employed in a television receiver for decoding and displaying graphics information such as may be encoded on a broadcast video signal. The system includes a graphics decoder (27) supplied with the encoded video signal, and a plurality of transmission ga (31-36) responsive to logic control signals derived from the outputs of the decoder (27). The gates (31-36) are coupled to inputs of video output stages (16) in the receiver, and operate in response to the control signals for interrupting normal video signals to the video output stages (16) and for enabling a voltage representative of a graphics display intensity level to be coupled to the video output stages (16) when graphics information is to be displayed. The system also includes a graphics level control network (25). The level control network (25) limits excessive graphics representative beam current levels to prevent image defocusing and kinescope screen burn. The level control network (25) also adjusts the graphics display intensity level in accordance with the level of image representative video signals in a mixed video plus graphics display mode, to preserve a desired contrast relationship between the displayed video and graphics information.
Abstract:
A television receiver includes a chassis (12) having a digital tuner (14) for generating local oscillator signals for tuning the receiver to respective channels in response to binary signals representing corresponding channel numbers and a signal processing unit (18) for controlling at least one characteristic of the receiver, such as the sound level, in response to binary signals representing the controllable characteristic. The receiver also includes a microcomputer (34) including a RAM (130) (Random Access Memory) with at least one memory location for storing binary signals representing the present time and a plurality of memory locations for storing binary signals representing future times and channel numbers of channels to be tuned at those times. A control portion (100) of the microcomputer causes binary signals representing the channel number associated with a future time to be coupled to the digital tuner when the present time matches the future time. A keyboard (32) having ten digit keys for generating binary signals representing the decimal digits between 0 and 9 and two characteristic keys to generate binary signals representing an increase and a decrease in the controllable characteristic is provided to enable user control of various operating modes of the receiver. When a user operates digit keys to form a number within a predetermined range of channel numbers e.g. 2-83, the control portion of the microcomputer causes the channel to be tuned. Subsequently operation of digit keys within the predetermined range of channel numbers causes the channel to be changed and operation of the characteristic keys causes the controllable characteristic to change. When a user operates digit keys to form a number not within the predetermined range of channel numbers, the control portion of the microcomputer causes power to be decoupled from the chassis. Subsequently, in response to the operation of a predetermined one of the characteristic keys, the control portion causes binary signals generated in response to the operation of the digit keys to be selectively coupled to either the RAM location associated with the present time or to the RAM location for future selections.
Abstract:
A digital memory (10) which contains digital data words representative of a desired symmetrical transfer characteristic of a digital signal processor. Digital signals which are to be processed are applied to the address inputs of the memory (10), producing output signals in conformance with the desired transfer characteristic. Advantage is taken of the symmetrical nature of the response characteristic to minimize the size of the memory. Data words corresponding to only a portion of the full dynamic range of the digital signal processor are stored in the memory (10), and memory locations are addressed and read out in accordance with the value of a polarity-determining bit of the input digital signal, with the output signals being translated over the required full dynamic range in accordance with the value of the polarity-determining bit. In a preferred embodiment of the invention, the memory (10) is a random access memory, with stored data values being altered in response to a user control to change the transfer characteristic of the processor.
Abstract:
A television sync signal generator adapted for ready conversion among various television standards includes a memory (216) in which information related to the magnitude of at least one component of a composite sync signal is stored at address locations each corresponding to at least one particular time in each recurrent television frame. A clock signal generator (212) addresses the memory (216) to sequentially read out the information so the sync signal can be reconstructed. By dividing the sync signal into four intervals which are selected by paging signals from one counter, a reduction in required memory capacity is achieved. For further reducing the number of memory addresses required, each memory address contains information relating to the instantaneous resolution or clock rate. A sample rate controller (820) is coupled to the memory for having the instantaneous clock address rate controlled in response to the contents of the memory.
Abstract:
In a television camera system, a horizontal synchronizing signal from a reference source (100) is sampled at the vertical rate by a first sampling gate (104) controlled by a vertical rate signal from a reference source (102). A signal related to the output of a horizontal frequency synchronizing pulse generator (E) is sampled at the vertical rate by a second sampling gate (106) controlled by the vertical rate signal. The output of each sampling gate is fed to an input of a phase detector (114) which develops an error signal indicative of the phase relationship between the two sampled signals. The error signal is utilized to control the phase of the generated horizontal synchronizing pulse to synchronize a remote television camera head even though connected by a cable of unknown length.
Abstract:
A system is described for automatic adjustment of a color television camera (14) for correcting for geometrical errors in the raster and amplitude errors in the video. The system includes means (13, 27) for measuring the errors, positions, or amplitudes of the camera output signals at different locations of the red, green, and blue rasters for simultaneously providing detected signals representing the detected error positions or amplitudes of these locations to a signal processing means (24). The processing means (24) selectively and separately processes said detected signals according to a plurality of algorithms for producing a plurality of correction signals. The correction signals are applied (28) to the camera (14) for adjusting the camera according to all of the correction signals before remeasuring the rasters.
Abstract:
A transducer (102) comprising a longitudinal bar of piezoelectric material (200) having one longitudinal face substantially covered with a first electrode (202) and the opposite longitudinal face in contact with a predetermined plural number of separate electrodes (204-1, 204-2, ... 204-n) spaced along the length thereof, permits all detected echoes to be processed by a single low input impedance amplifier (206) permanently coupled to the first electrode.