Abstract:
High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.
Abstract:
An oscillation circuit includes a temperature compensating section to which electric power is supplied from a main power supply and a backup power supply, an oscillating section, a function of which is compensated by a signal from the temperature compensating section, and a switch and a power-supply monitoring circuit configured to select, when the temperature compensating section is not operating, at least one of the main power supply and the backup power supply and control connection to the temperature compensating section.
Abstract:
An LC oscillator is provided that achieves improved phase noise performance. A variable frequency oscillator includes a variable supply source, an oscillator tank circuit, a variable capacitance circuit comprising MOS switches, and an oscillator tank voltage common mode adjustment circuit. When the capacitance of the variable capacitance circuit is varied to vary an output frequency of the variable frequency oscillator, the common mode voltage is adjusted to reduce transitions of the MOS switches between an inversion state and a depletion state during excursions of an output signal through one cycle of oscillation.
Abstract:
In a three-band switching oscillator, a switching circuit is provided to switch the operating conditions of a first and second voltage-controlled oscillator and to switch an oscillation frequency band of the first voltage-controlled oscillator. The switching circuit switches a first switch in accordance with a switching voltage inputted to a first switching terminal and switches an oscillation frequency band in accordance with a switching voltage inputted to a second switching terminal. Only when a high-level switching voltage is inputted to the second switching terminal, the second switch is placed into an open condition by a high-level switching voltage inputted to the first switching terminal and placed into a closed condition by a low-level switching voltage inputted thereto, and when a low-level switching voltage is inputted to the second switching terminal, the second switch is placed into the open condition irrespective of the switching voltage inputted to the first switching terminal.
Abstract:
An oscillator circuit includes an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor, a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable, and a second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable. The first bias current and the second bias current are used to tune a frequency range of the oscillator.
Abstract:
A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and in a case of varying temperature in a temperature range of ±5° C. centered on a reference temperature in intervals of 6 minutes, and assuming observation period as τ, a wander performance fulfills a condition that an MTIE value is equal to or shorter than 6 ns in a range of 0 s
Abstract:
An apparatus includes a tank circuit of a voltage controlled oscillator. A pair of alternating current coupling capacitors respectively couple the gates of the pair of transistors to the drains of the pair of transistors. A bias circuit is coupled to the gates of the pair of transistors and biases the transistors in accordance with a bias voltage such that the transistors alternatingly turn on during a plurality of peaks of an oscillating signal of the tank circuit and the transistors turn off during a plurality of crossing points of the oscillating signal. A feedback loop may be configured to detect a peak oscillating amplitude of the oscillating signal and adjust a bias voltage of the bias circuit based on the peak oscillating amplitude. Also, a supply capacitor may be coupled to the tank circuit and to the transistors to provide an instantaneous current to the VCO.
Abstract:
High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.
Abstract:
A voltage-controlled oscillator comprises a level converting circuit, an amplitude controller, a voltage-controlled oscillation section having differential delay cells connected in a ring form, and an output level converting circuit. The level converting circuit has limiters which respectively limit a maximum value and a minimum value of a control current. Those limiters permit only a region where the voltage-controlled oscillation section properly performs its oscillating operation to be used.
Abstract:
A voltage controlled tunable resonant circuit (100) has at least two resonant frequency ranges and reduced self modulation, and includes a resonant element (120), a variable reactance element (130), and a first voltage variable capacitor (VVC) (150). The variable reactance element (130) is coupled to the resonant element (120). The VVC (150) has two fixed capacitance values corresponding to two fixed capacitance bias voltage ranges, and is coupled to the resonant element (120) and the variable reactance element (130). The first VVC (150) is controlled by a first DC bias voltage (190) selected to be within one of the two fixed capacitance bias voltage ranges to establish one of the two resonant frequency ranges over which the voltage controlled tunable resonant circuit (100) is tuned by variation of the variable reactance element (130).