公开(公告)号：US20060171527A1

公开(公告)日：2006-08-03

申请号：US11027704

申请日：2004-12-30

Applicant: Michael Mills ,  Long Nguyen

Inventor： Michael Mills ,  Long Nguyen

IPC: H04M1/00

CPC classification number: H04M3/005 ,  H04M3/007 ,  H04M2201/06

Abstract: A driver is operated to drive signals from an integrated circuit. Operating the driver generates interference at substantially a first frequency that may interfere with circuitry sharing a power supply with the driver. A supply node is repeatedly coupled to and decoupled from the driver at substantially a second frequency higher than the first frequency to help supply power to the driver and to help prevent interference from propagating to circuitry sharing the power supply.

Abstract translation: 驱动器用于驱动集成电路的信号。 操作驱动器会产生基本上第一个频率的干扰，这可能会干扰与驱动器共享电源的电路。 电源节点在基本上高于第一频率的第二频率处重复地耦合到驱动器并从驱动器去耦，以帮助向驱动器供电，并且有助于防止干扰传播到共享电源的电路。

公开(公告)号：US06885067B2

公开(公告)日：2005-04-26

申请号：US10791764

申请日：2004-03-04

Applicant: Takasumi Ohyanagi ,  Atsuo Watanabe

Inventor： Takasumi Ohyanagi ,  Atsuo Watanabe

IPC: H01L21/331 ,  H01L21/336 ,  H01L21/762 ,  H01L21/77 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L21/84 ,  H01L27/06 ,  H01L27/08 ,  H01L27/12 ,  H01L29/08 ,  H01L29/10 ,  H01L29/73 ,  H01L29/78 ,  H01L29/786 ,  H04M3/00 ,  H04M3/18 ,  H01L27/01

CPC classification number: H01L29/66681 ,  G09G3/28 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/66265 ,  H01L29/66674 ,  H01L29/7317 ,  H01L29/7824 ,  H04M3/005 ,  H04M3/18 ,  H04M2201/06

Abstract: A power IC for an automobile engine control unit incorporating at least one semiconductor device comprising an N-channel insulated-gate filed-effect transistor formed on an SOI substrate, having an N-type layer having a concentration higher than a concentration of an N-type layer in contact with a p-body layer contacting a gate oxide film of the transistor. The high concentration N-type layer is formed in a region covering at most 95% of the source-drain distance between the p-body layer and a drain electrode of the transistor in the silicon substrate over an interface of a buried oxide film, the silicon substrate being in contact with both the field oxide film and the high concentration N-type layer contacting the drain electrode.

Abstract translation: 一种用于汽车发动机控制单元的电力IC，其结合有至少一个半导体器件，该半导体器件包括形成在SOI衬底上的N沟道绝缘栅场效应晶体管，具有浓度高于N- 型层与与晶体管的栅极氧化膜接触的p体层接触。 在掩埋氧化膜的界面上，覆盖硅基板​​中的晶体管的p体层和漏电极的源极 - 漏极距离的至多95％的区域形成高浓度N型层， 硅衬底与场氧化物膜和接触漏电极的高浓度N型层接触。

公开(公告)号：US06750513B2

公开(公告)日：2004-06-15

申请号：US10393951

申请日：2003-03-24

Applicant: Takasumi Ohyanagi ,  Atsuo Watanabe

Inventor： Takasumi Ohyanagi ,  Atsuo Watanabe

IPC: H01L2701

CPC classification number: H01L29/66681 ,  G09G3/28 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/66265 ,  H01L29/66674 ,  H01L29/7317 ,  H01L29/7824 ,  H04M3/005 ,  H04M3/18 ,  H04M2201/06

Abstract: An N-channel MOS field-effect transistor on an SOI substrate including a source electrode, drain and gate electrodes both disposed via a field oxide film, a gate oxide film, a high concentration P-type layer, a high concentration N-type layer contacting the source electrode and the gate oxide film, a high concentration N-type layer contacting the drain electrode, a p-body layer contacting the high concentration P-type and N-type layers and the gate oxide film. In this transistor, an N-type layer with a concentration higher than that of a drain region contacting the p-body layer constitutes a region covering at most 95% of the source-drain distance. Further, an N-type region having a concentration from 3×1016/cm3 to 1×1022/cm3 is provided near a buried oxide film under the drain electrode.

Abstract translation: 在SOI衬底上的N沟道MOS场效应晶体管，其包括经由场氧化膜设置的源电极，漏极和栅电极，栅极氧化膜，高浓度P型层，高浓度N型层 与源电极和栅极氧化膜接触，接触漏电极的高浓度N型层，与高浓度P型和N型层接触的p体层和栅氧化膜。 在该晶体管中，具有高于与p体层接触的漏极区域的浓度的N型层构成覆盖源极 - 漏极距离的至多95％的区域。 此外，在漏电极下方的掩埋氧化膜附近提供浓度为3×10 16 / cm 3至1×10 22 / cm 3的N型区域。

公开(公告)号：US4920556A

公开(公告)日：1990-04-24

申请号：US309497

申请日：1989-02-13

Applicant: Keith K. Wong

Inventor： Keith K. Wong

IPC: H04M1/2745 ,  H04M1/80 ,  H04M3/428 ,  H04M11/04

CPC classification number: H04M1/274575 ,  H04M1/80 ,  H04M11/04 ,  H04M3/4285 ,  H04M2201/06

Abstract: An improved telephone with three built in features that provide added conveniences and additional benefits for the user. These features are: Money Saver Timer, which tells the caller the amount of time is left of the current message or toll unit on a long distance call; Telephone Panic Switch, when pressed, will activate a circuit to automatically call and broadcast an emergency message to a group of pre-stored numbers; Music On Hold cards, which allow the user to play different music programs for the HOLD feature. These cards can be changed frequently to provide different music programs to the frequent caller.

Abstract translation: 改进的电话具有三个内置功能，为用户提供额外的便利和额外的好处。 这些功能包括：节省费用的计时器，用于告知来电者长途电话当前消息或长途电话剩余的时间; 电话紧急开关按下时，将激活一个电路，以自动呼叫并将一个紧急消息广播给一组预先存储的号码; 音乐持卡，允许用户为HOLD功能播放不同的音乐节目。 这些卡可以频繁更改，以便为频繁的呼叫者提供不同的音乐节目。

公开(公告)号：WO2006054042A1

公开(公告)日：2006-05-26

申请号：PCT/GB2005/004153

申请日：2005-10-27

Applicant: BOURNS LIMITED ,  BYATT, Stephen, Wilton ,  RUTGERS, Koenraad

Inventor： BYATT, Stephen, Wilton ,  RUTGERS, Koenraad

IPC: H02H9/04

CPC classification number: H04M3/18 ,  H01L27/0255 ,  H04M3/005 ,  H04M2201/06

Abstract: An integrated protection device for protecting a subscriber line interface circuit from over-voltages on a communications line. The device comprises a switching portion having a gate, a cathode and an anode and a voltage offset portion also having a cathode and an anode. The offset portion is arranged for electrical connection in series with said gate. A diode portion having a cathode and an anode is arranged for electrical connection in series with said offset portion and said gate of said switching portion. The switching portion is operable to switch from an OFF state to an ON state when a switching potential difference applied between said cathode and said anode exceeds substantially a gate potential difference applied between said gate terminal and one of said cathode or anode. The offset portion is operable to switch from a blocking state to a conducting state when an offset potential difference applied across said offset portion exceeds a pre-defined offset voltage. The switching diode and offset portions are fabricated proximate one another in a single segment of semiconductor material.

Abstract translation: 一种集成保护装置，用于保护用户线接口电路免于通信线路上的过电压。 该器件包括具有栅极，阴极和阳极的开关部分和还具有阴极和阳极的电压偏移部分。 偏移部分布置成与所述门串联电连接。 具有阴极和阳极的二极管部分被布置成与所述开关部分的所述偏移部分和所述栅极串联电连接。 当施加在所述阴极和所述阳极之间的开关电位差大大超过所述栅极端子与所述阴极或阳极中的一个之间施加的栅极电位差时，所述开关部分可操作以从断开状态切换到导通状态。 当跨越所述偏移部分施加的偏移电位差超过预定义的偏移电压时，偏移部分可操作以从阻挡状态切换到导通状态。 开关二极管和偏移部分在半导体材料的单个部分中彼此靠近地制造。

公开(公告)号：WO01031901A1

公开(公告)日：2001-05-03

申请号：PCT/GB1999/003535

申请日：1999-10-26

IPC: H04Q3/42 ,  H02H9/04 ,  H04M3/18

CPC classification number: H02H9/041 ,  H04M3/18 ,  H04M2201/06

Abstract: An overvoltage protector suitable for protecting conductors comprises first, second and third at least bipolar protection elements (132, 134, 136). A first electrode of each protection element is connected to a common node (138). A second electrode of the first protection element (132) and a second electrode of the second or third protection elements (134, 136) are suitable for connection to a conductor to be protected. The first and third elements (132, 136) have breakdown conduction characteristic in one direction and diode conduction characteristic in the other, and the second element (134) has breakdown conduction characteristic in both directions, wherein the respective first electrodes of the first and third elements (132, 136) are of the same polarity.

Abstract translation: 适用于保护导体的过电压保护器包括第一，第二和第三至少双极保护元件（132,134,136）。 每个保护元件的第一电极连接到公共节点（138）。 第一保护元件（132）的第二电极和第二或第三保护元件（134,136）的第二电极适于连接到待保护的导体。 第一和第三元件（132,136）在一个方向上具有击穿传导特性并且在另一个方向具有二极管导通特性，并且第二元件（134）在两个方向上具有击穿传导特性，其中第一和第三元件 元件（132,136）具有相同的极性。

公开(公告)号：US12101422B2

公开(公告)日：2024-09-24

申请号：US17720724

申请日：2022-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongwoon Kim ,  Eunsoo Park ,  Hyunsuk Choi

IPC: H04M1/02 ,  G06F1/16 ,  G06F3/041 ,  G06F3/044 ,  G06V40/13

CPC classification number: H04M1/0266 ,  G06F1/1656 ,  G06F3/0446 ,  G06V40/1306 ,  H04M1/0277 ,  G06F2203/04111 ,  H04M2201/06 ,  H04M2201/38

Abstract: An electronic device is provided, which includes a housing, a display, and a sensor panel that is disposed between the display and the housing and that senses input information of a stylus pen, in which the sensor panel includes a first sensor panel including an opening area and a second sensor panel disposed to cover at least part of the opening area and electrically connected with the first sensor panel, and the second sensor panel includes a first circuit board including a first sub-board and a second sub-board, at least part of the first sub-board and at least part of the second sub-board being spaced apart from each other to form a receiving space and a second circuit board, at least part of which being accommodated in the receiving space and surrounded by the first circuit board.

公开(公告)号：US20110121911A1

公开(公告)日：2011-05-26

申请号：US12948225

申请日：2010-11-17

Applicant: Koichiro KAMATA

Inventor： Koichiro KAMATA

IPC: H03C1/00

CPC classification number: H01L29/7869 ,  G06K19/07775 ,  H01L23/66 ,  H01L27/0629 ,  H01L28/20 ,  H01L28/40 ,  H01L29/78693 ,  H01L29/78696 ,  H01L2223/6677 ,  H03C1/36 ,  H04M2201/04 ,  H04M2201/06

Abstract: A modulation circuit includes a load and a transistor serving as a switch. The transistor has an oxide semiconductor layer in which hydrogen concentration is 5×1019/cm3 or less. The off-state current of the transistor is 1×10−13 A or less. A modulation circuit includes a load, a transistor serving as a switch, and a diode. The load, the transistor, and the diode are connected in series between the terminals of an antenna. The transistor has an oxide semiconductor layer in which hydrogen concentration is 5×1019/cm3 or less. An off-state current of the transistor is 1×10−13 A or less. On/off of the transistor is controlled in accordance with a signal inputted to a gate of the transistor. The load is a resistor, a capacitor, or a combination of a resistor and a capacitor.

Abstract translation: 调制电路包括负载和用作开关的晶体管。 该晶体管具有氢浓度为5×1019 / cm3以下的氧化物半导体层。 晶体管的截止电流为1×10-13A或更小。 调制电路包括负载，用作开关的晶体管和二极管。 负载，晶体管和二极管串联连接在天线的端子之间。 该晶体管具有氢浓度为5×1019 / cm3以下的氧化物半导体层。 晶体管的截止电流为1×10-13A或更小。 根据输入到晶体管的栅极的信号来控制晶体管的导通/截止。 负载是电阻器，电容器或电阻器和电容器的组合。

公开(公告)号：US07098723B2

公开(公告)日：2006-08-29

申请号：US10470520

申请日：2002-01-25

Applicant: Henrik Hellberg ,  Anders Emericks ,  Håkan Sjödin

Inventor： Henrik Hellberg ,  Anders Emericks ,  Håkan Sjödin

IPC: H03K3/01 ,  G05F1/10 ,  G05F3/02

CPC classification number: H04M3/005 ,  H04M2201/06

Abstract: In a circuit designed to output a varying output voltage, the substrate of the semi-conductor component is connected to a regulator, in particular a switch, connected to a lower potential than the potential of the substrate of the circuit. The circuit can for example be used in a Subscriber Line Interface Circuit (SLIC).

Abstract translation: 在设计成输出变化的输出电压的电路中，半导体部件的基板连接到调节器，特别是开关，其连接到比电路的基板的电位更低的电位。 该电路可以例如在用户线路接口电路（SLIC）中使用。

公开(公告)号：US06909155B2

公开(公告)日：2005-06-21

申请号：US10101162

申请日：2002-03-20

Applicant: Takasumi Ohyanagi ,  Atsuo Watanabe

Inventor： Takasumi Ohyanagi ,  Atsuo Watanabe

IPC: H01L21/331 ,  H01L21/336 ,  H01L21/762 ,  H01L21/77 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L21/84 ,  H01L27/06 ,  H01L27/08 ,  H01L27/12 ,  H01L29/08 ,  H01L29/10 ,  H01L29/73 ,  H01L29/78 ,  H01L29/786 ,  H04M3/00 ,  H04M3/18

CPC classification number: H01L29/66681 ,  G09G3/28 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/66265 ,  H01L29/66674 ,  H01L29/7317 ,  H01L29/7824 ,  H04M3/005 ,  H04M3/18 ,  H04M2201/06

Abstract: An N-channel MOS field-effect transistor on an SOI substrate including a source electrode, drain and gate electrodes both disposed via a field oxide film, a gate oxide film, a high concentration P-type layer, a high concentration N-type layer contacting the source electrode and the gate oxide film, a high concentration N-type layer contacting the drain electrode, a p-body layer contacting the high concentration P-type and N-type layers and the gate oxide film. In this transistor, an N-type layer with a concentration higher than that of a drain region contacting the p-body layer constitutes a region covering at most 95% of the source-drain distance. Further, an N-type region having a concentration from 3×1016/cm3 to 1×1022/cm3 is provided near a buried oxide film under the drain electrode.

Abstract translation: 在SOI衬底上的N沟道MOS场效应晶体管，其包括经由场氧化膜设置的源电极，漏极和栅电极，栅极氧化膜，高浓度P型层，高浓度N型层 与源电极和栅极氧化膜接触，接触漏电极的高浓度N型层，与高浓度P型和N型层接触的p体层和栅氧化膜。 在该晶体管中，具有高于与p体层接触的漏极区域的浓度的N型层构成覆盖源极 - 漏极距离的至多95％的区域。 此外，浓度为3×10 16 / cm 3至1×10 22 / cm 3的N型区域 设置在漏电极下方的埋入氧化膜附近。