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公开(公告)号：AU1906692A
公开(公告)日：1992-12-21
申请号：AU1906692
申请日：1992-04-28
Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.
Inventor： JAMES A MATTHEWS , GEERT ROSSEEL
IPC: H03K17/567 , H03K19/08 , H03K19/086 , H03K19/0944
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公开(公告)号：AU8005091A
公开(公告)日：1992-01-07
申请号：AU8005091
申请日：1991-06-10
Applicant: MICROUNITY SYSTEMS ENGINEERING INC
Inventor： MATTHEWS JAMES A
IPC: G02F1/09 , G02F1/19 , G11B11/00 , G11B11/10 , G11B11/105 , G11C7/00 , G11C11/18 , G11C13/04 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/105 , H01L29/788 , H01L29/792 , H01L43/06 , H01S3/10 , G11C13/06
Abstract: An optical modulator utilizing a magnetic semiconductor device, whose operation is based on the Hall effect, includes a magnetic material formed on a semiconductor substrate. When an incoming beam of light having a dominant polarization direction is directed onto the magnetic material it becomes modulated. The result is an outgoing beam of light which has a rotated plane of polarization when compared to the dominant polarization direction. The direction of the rotated plane of polarization is indicative of the information stored in the magnetic material. The modulator of the present invention further includes a means for writing the information to the magnetic material and a semiconductor sensor means for electrically verifying the contents of the magnetic material.
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公开(公告)号：AU3478793A
公开(公告)日：1993-08-03
申请号：AU3478793
申请日：1993-01-15
Applicant: MICROUNITY SYSTEMS ENGINEERING INC
Inventor： CHEN JANG FUNG , MATTHEWS JAMES A
IPC: G03F1/00 , G03F1/36 , G03F7/20 , G03F9/00 , H01L21/027
Abstract: An improvement for reducing proximity effects comprised of additional lines, referred to as intensity leveling bars, into the mask pattern. The leveling bars perform the function of adjusting the edge intensity gradients of isolated edges in the mask pattern, to match the edge intensity gradients of densely packed edges. Leveling bars are placed parallel to isolated edges such that intensity gradient leveling occurs on all isolated edges of the mask pattern. In addition, the leveling bars are designed to have a width significantly less than the resolution of the exposure tool. Therefore, leveling bars that are present in the mask pattern produce resist patterns that completely developed away when a nominal exposure energy is utilized during exposure of photoresist.
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公开(公告)号：AU1746795A
公开(公告)日：1995-08-29
申请号：AU1746795
申请日：1995-02-09
Applicant: MICROUNITY SYSTEMS ENGINEERING INC
Inventor： CHEN JANG FUNG , MATTHEWS JAMES A
Abstract: A mask 206 for use in an apparatus utilized for optically transferring a lithographic pattern corresponding to an integrated circuit from said mask 206 onto a semiconductor substrate, said apparatus utilizing off-cases illumination, said pattern including at least one feature, said mask 206 comprising: an additional feature 215, 216 adjacent to and surrounding said at least one feature, said additional feature 215, 216 being disposed at a predetermined distance from all edges of said at least one feature and having the same transparency as said at least one feature, the width of said additional feature 215, 216 being selected such that the depth of focus of said at least one feature is increased.
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公开(公告)号：AU2805092A
公开(公告)日：1993-05-21
申请号：AU2805092
申请日：1992-10-19
Applicant: MICROUNITY SYSTEMS ENGINEERING INC
Inventor： JAMES A MATTHEWS
IPC: H01L29/73 , H01L21/331 , H01L29/10 , H01L29/36 , H01L29/732
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Patent Agency Ranking
公开(公告)号：EP2309382A1
公开(公告)日：2011-04-13
申请号：EP10179602.7
申请日：1999-08-24
Applicant: MicroUnity Systems Engineering, Inc.
Inventor： Hansen, Craig
CPC classification number: G06F9/30014 , G06F7/483 , G06F7/4991 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30101 , G06F9/30112 , G06F9/30167 , G06F9/3017 , G06F9/3824 , G06F9/383 , G06F9/3851 , G06F9/3885
Abstract: A general purpose processor with four copies of an access unit, with an access instruction fetch queue A-queue (101-104). Each A-queue (101-104) is coupled to an access register file AR (105-108) which is coupled to two access functional units A (109-116). In a typical embodiment, each thread of the processor may have on the order of sixty-four general purpose registers. The access unit functions independently by four simultaneous threads of execution, and each compute control flow by performing arithmetic and branch instructions and access memory by performing load and store instructions. These access units also provide wide specifiers for wide operand instructions. These eight access functional units A (109-116) produce results for access register files (105-108) and memory addresses to a shared memory system (117-120).
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公开(公告)号：EP2226726A3
公开(公告)日：2010-10-20
申请号：EP10167237.6
申请日：2004-07-12
Applicant: MicroUnity Systems Engineering, Inc.
Inventor： Hansen, Craig , Moussouris, John , Massalin, Alexia
CPC classification number: G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
Abstract: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width accessible number of general purpose registers.
Abstract translation: 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展为大于通用寄存器或数据路径宽度的宽度来改善处理器的性能。 本发明通过使用通用寄存器的内容来提供实质上大于处理器的数据路径宽度的操作数，以指定可以读取或写入多个数据路径宽度的存储器地址，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的若干指令和装置，如果操作数不限于通用寄存器的宽度可访问数量，则这些指令和装置获得性能优势。
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公开(公告)号：EP1873654A3
公开(公告)日：2008-08-06
申请号：EP07111350.0
申请日：1996-08-16
Applicant: MicroUnity Systems Engineering, Inc.
CPC classification number: G06F9/3802 , G06F9/30 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30072 , G06F9/30087 , G06F9/30145 , G06F9/3867 , G06F9/3869 , G06F12/0875 , G06F12/1027 , G06F15/7832 , G06F15/7842 , G06F2212/2515 , H04N21/2365 , H04N21/238 , H04N21/23805 , H04N21/4347 , Y02D10/13
Abstract: A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
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公开(公告)号：EP1873628A3
公开(公告)日：2008-05-21
申请号：EP07111344.3
申请日：1996-08-16
Applicant: MicroUnity Systems Engineering, Inc.
Inventor： Hansen, Craig , Moussouris, John
CPC classification number: G06F9/3802 , G06F9/30 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30072 , G06F9/30087 , G06F9/30145 , G06F9/3867 , G06F9/3869 , G06F12/0875 , G06F12/1027 , G06F15/7832 , G06F15/7842 , G06F2212/2515 , H04N21/2365 , H04N21/238 , H04N21/23805 , H04N21/4347 , Y02D10/13
Abstract: A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (lOG). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
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公开(公告)号：EP1879398A2
公开(公告)日：2008-01-16
申请号：EP07112548.8
申请日：1996-08-16
Applicant: MicroUnity Systems Engineering, Inc.
Inventor： Hansen, Craig , Moussouris, John
CPC classification number: G06F9/3802 , G06F9/30 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30072 , G06F9/30087 , G06F9/30145 , G06F9/3867 , G06F9/3869 , G06F12/0875 , G06F12/1027 , G06F15/7832 , G06F15/7842 , G06F2212/2515 , H04N21/2365 , H04N21/238 , H04N21/23805 , H04N21/4347 , Y02D10/13
Abstract: A set-top box for processing streams of media data which comprise a combination of at least two of audio, video, radio, graphics, encryption, authentication, and networking information. The set-top box processes streams of media data and has at least one programmable media processor (12) for receiving, processing and transmitting the stream of media data over the bi-directional communications network. The processor executes group instructions to read a plurality of data elements of the media data stream from a register file (110), to perform, on the data elements, group operations including both group integer and group floating point operations capable of dynamically partitioning the data by each specifying one of a plurality of data element sizes, and to write concatenated results in the register file.
Abstract translation: 用于处理媒体数据流的机顶盒，其包括音频，视频，无线电，图形，加密，认证和网络信息中的至少两个的组合。 机顶盒处理媒体数据流，并且具有用于通过双向通信网络接收，处理和发送媒体数据流的至少一个可编程媒体处理器（12）。 处理器执行组指令以从寄存器文件（110）读取媒体数据流的多个数据元素，以对数据元素执行包括能够动态划分数据的组整数和组浮点运算的组操作 通过每个指定多个数据元素大小中的一个，并将连接的结果写入寄存器文件。
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