Abstract:
Methods here disclosed provide for selectively coating the top surfaces or ridges of a 3-D substrate while avoiding liquid coating material wicking into micro cavities on 3-D substrates. The substrate includes holes formed in a three-dimensional substrate by forming a sacrificial layer on a template. The template includes a template substrate with posts and trenches between the posts. The steps include subsequently depositing a semiconductor layer and selectively etching the sacrificial layer. Then, the steps include releasing the semiconductor layer from the template and coating the 3-D substrate using a liquid transfer coating step for applying a liquid coating material to a surface of the 3-D substrate. The method may further include coating the 3-D substrate by selectively coating the top ridges or surfaces of the substrate. Additional features may include filling the micro cavities of the substrate with a filling material, removing the filling material to expose only the substrate surfaces to be coated, coating the substrate with a layer of liquid coating material, and removing said filling material from the micro cavities of the substrate.
Abstract:
According to one aspect of the disclosed subject matter, a method for forming self aligned contacts for monolithically isled back contact back junction solar cells is provided.
Abstract:
Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions. An amorphous silicon passivating layer is positioned on the base regions. A first level base and emitter metallization contacts the emitter regions and the amorphous silicon passivating layer on the base regions. An electrically insulating backplane is positioned on the first level base and emitter metallization. A second level metallization contacts the first level base and emitter metallization through conductive vias in the electrically insulating backplane.
Abstract:
The laser patterning methods utilizing a laser absorbent hard mask in combination with wet etching to form patterned solar cell doped regions which may further improve cell efficiency by completely avoiding laser ablation of an underlying semiconductor substrate associated with ablation of an overlying transparent passivation layer.
Abstract:
Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers.
Abstract:
According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell using bulk wafers is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.
Abstract:
According to one aspect of the disclosed subject matter, a monolithically isled solar cell is provided. The solar cell comprises a semiconductor layer having a light receiving frontside and a backside opposite the frontside and attached to an electrically insulating backplane. A trench isolation pattern partitions the semiconductor layer into electrically isolated isles on the electrically insulating backplane. A first metal layer having base and emitter electrodes is positioned on the semiconductor layer backside. A patterned second metal layer providing cell interconnection and connected to the first metal layer by via plugs is positioned on the backplane.
Abstract:
This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
Abstract:
The disclosed subject matter pertains to deposition of thin film or thin foil materials in general, but more specifically to deposition of epitaxial monocrystalline or quasi-monocrystalline silicon film (epi film) for use in manufacturing of high efficiency solar cells. In operation, methods are disclosed which extend the reusable life and to reduce the amortized cost of a reusable substrate or template used in the manufacturing process of silicon and other semiconductor solar cells.
Abstract:
A back contact back junction thin-film solar cell is formed on a thin-film semiconductor solar cell. Preferably the thin film semiconductor material comprises crystalline silicon. Emitter regions, selective emitter regions, and a back surface field are formed through ion implantation and annealing processes.