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41.发明申请公开(公告)号：US20100148142A1
公开(公告)日：2010-06-17
申请号：US12332837
申请日：2008-12-11
Applicant: WEI-CHIH CHIEN , Kuo-Pin Chang , Yi-Chou Chen , Erh-Kun Lai , Kuang-Yeu Hsieh
Inventor： WEI-CHIH CHIEN , Kuo-Pin Chang , Yi-Chou Chen , Erh-Kun Lai , Kuang-Yeu Hsieh
IPC: H01L21/329 , H01L45/00
CPC classification number: G11C17/16 , H01L27/101 , H01L27/1021
Abstract: Memory devices are described along with methods for manufacturing. A memory device as described herein includes a first electrode and a second electrode. The memory device further includes a diode and an anti-fuse metal-oxide memory element comprising aluminum oxide and copper oxide. The diode and the metal-oxide memory element are arranged in electrical series between the first electrode and the second electrode.
Abstract translation: 描述存储器件以及制造方法。 如本文所述的存储器件包括第一电极和第二电极。 存储器件还包括二极管和包含氧化铝和氧化铜的抗熔丝金属氧化物存储元件。 二极管和金属氧化物存储元件电连接在第一电极和第二电极之间。
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公开(公告)号：US20100139767A1
公开(公告)日：2010-06-10
申请号：US12472359
申请日：2009-05-26
Applicant: Jui-Ching Hsieh , Pin Chang , Chung-De Chen , Li-Chi Pan , Yu-Jen Wang , Chin-Horng Wang
Inventor： Jui-Ching Hsieh , Pin Chang , Chung-De Chen , Li-Chi Pan , Yu-Jen Wang , Chin-Horng Wang
IPC: H01L31/024 , H01L23/34 , H01L33/00 , H01L21/50
CPC classification number: H01L23/3672 , H01L23/42 , H01L31/052 , H01L33/62 , H01L33/641 , H01L33/642 , H01L2224/05001 , H01L2224/05023 , H01L2224/05568 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/16 , Y02E10/50 , H01L2924/00014 , H01L2924/0105 , H01L2924/013
Abstract: A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the heat dissipation substrate and the chip. The heterojunction heat conduction buffer layer includes a plurality of pillars perpendicular to the heat dissipation substrate. The aspect ratio of each pillar is between about 3:1 and 50:1.
Abstract translation: 提供了包括散热基板，芯片和异质结导热缓冲层的芯片封装结构。 芯片设置在散热基板上。 异质结导热缓冲层设置在散热基板和芯片之间。 异质结导热缓冲层包括垂直于散热基板的多个支柱。 每个柱的纵横比在约3:1至50:1之间。
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公开(公告)号：US20100083746A1
公开(公告)日：2010-04-08
申请号：US12420166
申请日：2009-04-08
Applicant: Chung-De Chen , Yu-Jen Wang , Chien Li , Shih-Hao Wang , Pin Chang
Inventor： Chung-De Chen , Yu-Jen Wang , Chien Li , Shih-Hao Wang , Pin Chang
CPC classification number: H02K35/02
Abstract: A swinging apparatus comprising an energy provider and a swinging mechanism disposed thereon. By means of adjusting the size and shape of the swinging mechanism and adjusting a distance between the swinging mechanism and the energy provider so as to control the ratio of the distance between the swinging mechanism and the energy provider to a characteristic value corresponding to the swing mechanism in a range between 4 and 0.25, the swinging frequency of the swinging mechanism may be adjusted automatically to comply with the variation of the motion frequency of the energy provider. The present invention further provides an energy harvester to work with the swinging apparatus and a coil to generate an induced current for power generation during the swing of the swing mechanism. In the present invention, the natural frequency of the swing mechanism may be adjusted according to the rotational velocity of the energy provider.
Abstract translation: 一种摆动装置，包括能量供应器和设置在其上的摆动机构。 通过调节摆动机构的尺寸和形状并调节摆动机构与能量提供者之间的距离，以便控制摆动机构与能量提供者之间的距离与对应于摆动机构的特性值的比率 在4和0.25之间的范围内，可以自动调节摆动机构的摆动频率以符合能量提供者的运动频率的变化。 本发明还提供一种与摆动装置一起工作的能量收集器和一个线圈，用于在摆动机构摆动期间产生用于发电的感应电流。 在本发明中，摆动机构的固有频率可以根据能量提供者的旋转速度进行调节。
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公开(公告)号：US20100017555A1
公开(公告)日：2010-01-21
申请号：US12320141
申请日：2009-01-21
Applicant: Li-Pin Chang , Ming-Dar Chen , Chien-Ting Huang
Inventor： Li-Pin Chang , Ming-Dar Chen , Chien-Ting Huang
CPC classification number: G06F12/0246 , G06F2212/7211
Abstract: A control method of a memory storage device for writing an updated data from a host to the memory storage device is provided. The memory storage device provides storage space which is divided into a plurality of physical blocks to access the updated data. The control method includes the following steps: first, determining whether the updated data is a hot data or not; finally, storing the less updated data which is not the hot data into the physical block which has the higher erase counts according to the result of above determination.
Abstract translation: 提供了一种用于将更新的数据从主机写入存储器存储装置的存储器存储装置的控制方法。 存储器存储设备提供存储空间，其被划分为多个物理块以访问更新的数据。 该控制方法包括以下步骤：首先，确定更新的数据是否为热数据; 最后，根据上述确定的结果，将不是热数据的较少更新的数据存储到具有较高擦除次数的物理块中。
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公开(公告)号：US20090217511A1
公开(公告)日：2009-09-03
申请号：US12040234
申请日：2008-02-29
Applicant: Mu-Yuan Chen , Wen-Feng Wu , Chi-Pin Chang , Kao-Po Chien
Inventor： Mu-Yuan Chen , Wen-Feng Wu , Chi-Pin Chang , Kao-Po Chien
IPC: H01C17/06
CPC classification number: H01C17/06 , H01C17/006 , Y10T29/49082 , Y10T29/49099 , Y10T29/49101 , Y10T29/49124
Abstract: A method for making chip resistor components includes: (a) forming a plurality of first and second notches in a substrate so as to form resistor-forming strips; (b) forming pairs of upper and lower electrodes on each of the resistor-forming strips; (c) forming a resistor film on each of the resistor-forming strips; (d) forming an insulator layer on the resistor film; (e) forming a hole pattern in the insulator layer and the resistor film; (f) forming an insulating shield layer on the insulator layer; (g) cleaving the substrate along the first notches so as to form a plurality of strip-like semi-finished products; (h) forming a pair of side electrodes on two opposite sides of each of the semi-finished products; and (i) cleaving each of the semi-finished products.
Abstract translation: 一种制造芯片电阻器组件的方法包括：（a）在衬底中形成多个第一和第二凹口，以形成电阻器形成条; （b）在每个电阻器形成条上形成一对上电极和下电极; （c）在每个电阻器形成条上形成电阻膜; （d）在电阻膜上形成绝缘体层; （e）在绝缘体层和电阻膜中形成孔图案; （f）在绝缘体层上形成绝缘屏蔽层; （g）沿着所述第一凹口切割所述基板，以形成多个条状半成品; （h）在每个半成品的两个相对侧上形成一对侧电极; 和（i）切割每个半成品。
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Patent Agency Ranking
公开(公告)号：US20090169067A1
公开(公告)日：2009-07-02
申请号：US12344813
申请日：2008-12-29
Applicant: Yin-Pin CHANG , Tai-Chang YANG , Hong-Long CHOU
Inventor： Yin-Pin CHANG , Tai-Chang YANG , Hong-Long CHOU
IPC: G06K9/00
CPC classification number: G06K9/00295
Abstract: Face detection and tracking method is executed by a computer or a microprocessor with computing capability for identifying human faces and positions thereof in image frames. First, face detection is performed to detect human faces in a plurality of frames. Then, face tracking is performed on each of the frames to track the detected human faces and record positions of these human faces. Afterward, face detection on the image frames is again performed every few frames, skipping the positions of the human faces that have been recorded, so as to quickly search for other human faces that might be newly added.
Abstract translation: 面部检测和跟踪方法由具有计算能力的计算机或微处理器执行，用于在图像帧中识别人脸和位置。 首先，进行脸部检测以检测多个帧中的人脸。 然后，对每个帧执行脸部跟踪以跟踪检测到的人脸并记录这些人脸的位置。 之后，每隔几帧再次执行图像帧上的脸部检测，跳过已经记录的人脸的位置，以便快速搜索可能新添加的其他人脸。
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47.发明申请公开(公告)号：US20090161901A1
公开(公告)日：2009-06-25
申请号：US12172900
申请日：2008-07-14
Applicant: Tzong-Che Ho , Jason Pan , Pin Chang , Chin-Horng Wang , Jung-Tai Chen , Hsin-Li Lee , Kai-Hsiang Yen
Inventor： Tzong-Che Ho , Jason Pan , Pin Chang , Chin-Horng Wang , Jung-Tai Chen , Hsin-Li Lee , Kai-Hsiang Yen
IPC: H04R1/00
CPC classification number: H04R19/005 , B81B7/0058 , B81B2201/0257 , H01L2924/0002 , H01L2924/00
Abstract: An ultra thin package for an electric acoustic sensor chip of a micro electro mechanical system is provided. A substrate has a first substrate surface and a second substrate surface opposite to the first substrate surface. At least one conductor bump is formed on the second substrate surface. An electric acoustic sensor chip having a first chip surface and a second chip surface opposite to the first chip surface is provided. The first chip surface is electrically connected to the conductor bump. The conductor bump is positioned between the second substrate surface and the first chip surface to create a space. The conductor bump is used for transferring a signal from the sensor chip to the substrate. An acoustic opening passing through the substrate is formed.
Abstract translation: 提供了一种用于微机电系统的电声传感器芯片的超薄封装。 衬底具有与第一衬底表面相对的第一衬底表面和第二衬底表面。 在第二基板表面上形成至少一个导体凸块。 提供具有与第一芯片表面相对的第一芯片表面和第二芯片表面的电声传感器芯片。 第一芯片表面电连接到导体凸块。 导体凸块位于第二基板表面和第一芯片表面之间以产生空间。 导体凸块用于将信号从传感器芯片传送到基板。 形成通过基板的声学开口。
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公开(公告)号：US20090160980A1
公开(公告)日：2009-06-25
申请号：US12139526
申请日：2008-06-16
Applicant: Yu-Chen Huang , Yin-Pin Chang
Inventor： Yu-Chen Huang , Yin-Pin Chang
IPC: H04N5/235
CPC classification number: G06T5/40 , G06T5/008 , G06T7/12 , G06T2207/20012
Abstract: A graduated processing method of digital image is adapted to a digital camera for immediately adjusting brightness in different regions of a shot digital image. The processing method includes the following steps. An image capturing device determines an image boundary of a digital image according to an image difference condition in the digital image. Then, a graduated layer is used in the digital image along a vertical direction of the image boundary, and a brightness difference in different regions of the digital image is adjusted.
Abstract translation: 数字图像的分级处理方法适用于数码相机，用于立即调整拍摄数字图像的不同区域中的亮度。 处理方法包括以下步骤。 图像捕获装置根据数字图像中的图像差异条件来确定数字图像的图像边界。 然后，沿着图像边界的垂直方向在数字图像中使用刻度层，并且调整数字图像的不同区域中的亮度差。
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公开(公告)号：US07541898B2
公开(公告)日：2009-06-02
申请号：US11849914
申请日：2007-09-04
Applicant: Jiangyuan Qian , Hung-Pin Chang , Bedri A. Cetiner , Mark Bachman , Franco DeFlaviis , Guann-Pyng Li
Inventor： Jiangyuan Qian , Hung-Pin Chang , Bedri A. Cetiner , Mark Bachman , Franco DeFlaviis , Guann-Pyng Li
CPC classification number: H01H59/0009 , H01G5/16 , H01G5/40 , H01H2001/0084 , Y10T29/49002 , Y10T29/49105 , Y10T29/49117 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156
Abstract: The systems and methods described herein provide for a radio frequency micro-electromechanical systems switch having two or more resonant frequencies. The switch can be configured as a capacitive shunt switch having a deflectable member coupled between two electrodes over a transmission line. A first insulator can be located between one of the electrodes and the deflectable member to form a capacitive element. The deflectable member can be deflectable between an up-state and a down-state, the down-state capacitively coupling the deflectable member with the transmission line. The degree by which the deflectable member overlaps the first insulator can be adjusted to adjust the capacitance of the capacitive element and the resulting resonant frequency.
Abstract translation: 本文所述的系统和方法提供具有两个或更多个谐振频率的射频微机电系统开关。 开关可以被配置为具有通过传输线耦合在两个电极之间的可偏转构件的电容分流开关。 第一绝缘体可以位于电极之间和可偏转构件之间，以形成电容元件。 可偏转构件可以在上升状态和下降状态之间偏转，下降状态将可偏转构件与传输线电容耦合。 可以调节可偏转构件与第一绝缘体重叠的程度，以调整电容元件的电容和所得到的谐振频率。
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公开(公告)号：US20090020740A1
公开(公告)日：2009-01-22
申请号：US12176183
申请日：2008-07-18
Applicant: Wei-Chih CHIEN , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
Inventor： Wei-Chih CHIEN , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
CPC classification number: H01L45/04 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1633 , Y10S438/90
Abstract: A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
Abstract translation: 存储器件包括具有存储元件的第一和第二电极以及位于它们之间并与之电耦合的缓冲层。 记忆元件包括一种或多种金属氧化合物。 缓冲层包括氧化物和氮化物中的至少一种。 另一个存储器件包括具有存储元件和缓冲层的第一和第二电极，其厚度小于50，位于它们之间并与之电耦合。 记忆体包括一种或多种金属氧化合物。 制造存储器件的方法的一个例子包括形成第一和第二电极。 形成位于第一和第二电极之间并电耦合到第一和第二电极的存储器; 存储器包括一种或多种金属氧化合物，并且缓冲层包括氧化物和氮化物中的至少一种。
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