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公开(公告)号:DE60211460D1
公开(公告)日:2006-06-22
申请号:DE60211460
申请日:2002-10-11
Applicant: ST MICROELECTRONICS PVT LTD
Inventor: CHAKRAVARTHY KALYANA
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公开(公告)号:DE60204189D1
公开(公告)日:2005-06-23
申请号:DE60204189
申请日:2002-06-06
Applicant: ST MICROELECTRONICS PVT LTD
Inventor: SINGH MONINDER , CHAUDHRY ANURAG
IPC: H03K19/177
Abstract: A field programmable logic device comprising at least two independently configurable embedded memory structures wherein said memory structures differ in at least one of the following parameter memory size available configuration depths available configuration widths for efficient memory utilization.
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