公开(公告)号：WO2006121478A3

公开(公告)日：2006-11-16

申请号：PCT/US2006/004676

申请日：2006-02-09

Applicant: STAKTEK GROUP L.P. ,  GOODWIN, Paul

Inventor： GOODWIN, Paul

IPC: H05K7/02

Abstract: In some embodiments, a high density circuit module is provided having a support frame supporting a flexible circuit. A main integrated circuit and one or more supporting integrated circuit are mounted to the flexible circuit. Electrical connections between the main integrated circuit and the one or more integrated circuits are made on the flexible circuit. In other embodiments, a main integrated circuit such as, for example, a network processor, is mounted to a flexible circuit. Supporting integrated circuits, such as, for example, memory devices used by the network processor, are mounted on side portions of the flexible circuit. The side portions are folded to place the supporting integrated circuits higher than the main integrated circuit. Such placement may direct cooling airflow over the main integrated circuit's heat sink.

公开(公告)号：WO2005114726A3

公开(公告)日：2005-12-01

申请号：PCT/US2005/016764

申请日：2005-05-11

Applicant: STAKTEK GROUP L.P. ,  WEHRLY, Douglas, Jr. ,  CADY, James ,  PARTRIDGE, Julian ,  ROPER, David

Inventor： WEHRLY, Douglas, Jr. ,  CADY, James ,  PARTRIDGE, Julian ,  ROPER, David

IPC: H01L23/02

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry. That flex circuitry may exhibit one or more conductive layers with preferred embodiments having two conductive layers. A form standard is disposed along the lower planar surface and extends laterally beyond the package of one or more CSPs in a stacked module. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be comprised of heat conductive material such as copper, for example.

公开(公告)号：WO2005112100A2

公开(公告)日：2005-11-24

申请号：PCT/US2005/013336

申请日：2005-04-19

Applicant: STAKTEK GROUP L.P. ,  PARTRIDGE, Julian ,  WEHRLY, JR., Douglas

Inventor： PARTRIDGE, Julian ,  WEHRLY, JR., Douglas

IPC: H01L21/44

CPC classification number: H01L23/3114 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/01327 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/056 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a preferred embodiment in accordance with the invention, a form standard associated with one or more CSPs provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the contacts of the lower CSP will be compressed before flex circuitry is attached to a combination of the CSP and a form standard to create lower profile contacts between CSP and the flex circuitry.

Abstract translation: 本发明将芯片级封装集成电路（CSP）堆叠成保存PWB或其他板表面积的模块。 在根据本发明的优选实施例中，与一个或多个CSP相关联的形式标准提供了一种物理形式，其允许在广泛的CSP包装系列中发现的许多变化的包装尺寸被利用，同时使用标准连接柔性 电路设计。 在优选实施例中，在CSP和形式标准的组合连接到柔性电路之前，下CSP的触点将被压缩，以在CSP和柔性电路之间形成下部轮廓接触。