41.
    发明专利
    未知

    公开(公告)号:DE69421606D1

    公开(公告)日:1999-12-16

    申请号:DE69421606

    申请日:1994-03-30

    Abstract: A manufacturing process for obtaining integrated structure bipolar transistors with controlled storage time comprises the steps of: in a silicon material (1, 2), forming at least one bipolar transistor occupying a first area (AD) on a first surface of the silicon material (1, 2); covering the first surface of the silicon material (1, 2) with an insulating material layer (5); selectively removing the insulating material layer (5) to open at least one window (6) having a second area (APt) much smaller than the first area (AD) occupied by the bipolar transistor; implanting into the silicon material (1, 2) a medium dose (D) of platinum ions through said window (6); and diffusing into the silicon material (1, 2) the implanted platinum ions to obtain a uniform distribution of platinum inside the transistor.

    42.
    发明专利
    未知

    公开(公告)号:DE69321966T2

    公开(公告)日:1999-06-02

    申请号:DE69321966

    申请日:1993-12-24

    Abstract: An integrated structure pad assembly for lead bonding to a power semiconductor device chip comprises a chip portion having a top surface covered by a metallization layer (10) and which comprises a first sub-portion (1) wherein functionally active elements of the power device are present; said chip portion comprises at least one second sub-portion (11) wherein no functionally active elements of the power device are present, and a top surface of the metallization layer (10) is elevated over said at least one second sub-portion (11) with respect to the first sub-portion (1) to form at least one protrusion which forms a support surface for a lead.

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