公开(公告)号：EP1632029A1

公开(公告)日：2006-03-08

申请号：EP04751468.2

申请日：2004-05-06

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： DEMIR, Alpaslan ,  KAZAKEVICH, Leonid ,  HAQUE, Tanbir

IPC: H04B1/06 ,  H04B7/00 ,  H04L25/10 ,  H04L27/08

CPC classification number: H04L27/3809 ,  H03G3/001 ,  H03G3/3052 ,  H04B1/30 ,  H04L27/38 ,  H04L2027/003 ,  H04L2027/0046 ,  H04W52/52

Abstract: A communication system (100) including an automatic control (AGC) circuit (105), a receiver (110), an analog to digital (ADC) converter (115) and an insertion phase variation compensation module (120). The AGC circuit receives and amplifies communication signals (150). The gain of the AGC circuit is adjusted. The AGC circuit outputsan amplified signal (145) to the receiver which, in turn, outputs an analog complex signal to the ADC (115). The ADC outputs a digital complex signal to the insertion phase variation compensation module (120) which counteracts the effects of phase offsets introduced into the communication signal due to the continuous gain adjustments associated with the AGC circuit.

公开(公告)号：EP1595346A2

公开(公告)日：2005-11-16

申请号：EP04708578.2

申请日：2004-02-05

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： DEMIR, Alpaslan ,  GRIECO, Donald, M. ,  HAIM, John, W. ,  BEDNARZ, Andrew, F. ,  PIETRASKI, Philip, J. ,  GUCCIONE, Louis, J. ,  CHITRAPU, Prabhakar, R.

IPC: H04J3/06

CPC classification number: H04B1/7083 ,  H04B1/70735 ,  H04B1/70755 ,  H04B1/709 ,  H04B2201/70701 ,  H04W48/16 ,  H04W56/00

Abstract: A method and system for performing initial cell search is disclosed. Step 1 (208) processing is preformed to detect a peak primary synchronization code (PSC) location (i.e. chip offset or chip location). Step 2 (210) processing is performed to obtain the toffset and code group. Step 3 (212) processing is performed to identify the midamble of a base station with which the WTRU performing the initial cell search may synchronize with.

公开(公告)号：EP1590974A2

公开(公告)日：2005-11-02

申请号：EP04704959.8

申请日：2004-01-23

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： DEMIR, Alpaslan ,  GRIECO, Donald, M. ,  HAIM, John W. ,  BEDNARZ, Andrew, F.

IPC: H04Q7/20

CPC classification number: H04W48/10 ,  H04W48/02 ,  H04W48/16 ,  H04W56/00

Abstract: A method and system for performing initial cell search in wireless communication system wherein unsuitable cells are excluded is disclosed. Stored frequencies are searched exhaustively and initial frequencies are search non-exhaustively. Initial frequencies may be searched exhaustively in certain circumstances. When performing exhaustive initial cell searches, primary synchronization codes that lead to unsuitable cells are excluded from subsequent initial cell searches performed on the same frequency.

公开(公告)号：EP1568192A1

公开(公告)日：2005-08-31

申请号：EP03783365.4

申请日：2003-11-14

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： OZLUTURK, Fatih ,  KAZAKEVICH, Leonid ,  HAQUE, Tanbir ,  DEMIR, Alpaslan ,  NARAYAN, Geetha, Lakshmi ,  KEARNEY, Kenneth

IPC: H04M1/00

CPC classification number: H03G3/001 ,  H03D3/008 ,  H03D3/009 ,  H03G3/3068 ,  H03G3/3089 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/302 ,  H03G2201/307 ,  H03G2201/508 ,  H04B1/30 ,  H04L2027/0016 ,  H04L2027/0024

Abstract: In order to compensate for performance degradation caused by inferior low-cost analog radio component (105) tolerances of an analog radio (100), a future system architecture (FSA) wireless communication transceiver employs numerous digital signal processing techniques to compensate for deficiencies of such analog components so that modern specifications may be relaxed. Automatic gain control (110) functions are provided in the digital domain, so as to provide enhanced phase and amplitude compensation, as well as many other radio frequency parameters.

公开(公告)号：EP1540912A2

公开(公告)日：2005-06-15

申请号：EP03772022.4

申请日：2003-07-28

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： DEMIR, Alpaslan

IPC: H04L27/08

CPC classification number: H04B1/14 ,  H03J2200/02 ,  H04B1/70735 ,  H04B1/708 ,  H04J11/0069 ,  H04L27/0014 ,  H04L2027/0024 ,  H04L2027/0065 ,  H04L2027/0091

Abstract: Method and apparatus for adjusting the frequency of a VCO (46) at a receiver to synchronize the receiver with the transmitter by correlating (66) a synchronization code channel with training sequences to estimate positive and negative offsets (34, 36, 38) which are employed to estimate an error, which is then filtered. The filter (42) output provides voltage controlling the VCO. The same technique may be employed to control a numeric controlled oscillator (NCO) (46).