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公开(公告)号：US20180286105A1
公开(公告)日：2018-10-04
申请号：US15477019
申请日：2017-04-01
Applicant: Intel Corporation
Inventor： Prasoonkumar Surti , Karthik Vaidyanathan , Atsuo Kuwahara , Hugues Labbe , Sameer KP , Jonathan Kennedy , Joydeep Ray , Travis T. Schluessler , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Tomer Bar-On , Carsten Benthin , Adam T. Lake , Vasanth Ranganathan , Abhishek R. Appu
CPC classification number: H04N5/23212 , G02B27/017 , G06K9/00765 , G06T15/005 , H04N13/239 , H04N13/344
Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a sense engine communicatively coupled to the graphics subsystem to provide sensed information, a focus engine communicatively coupled to the sense engine and the graphics subsystem to provide focus information, a motion engine communicatively coupled to the sense engine, the focus engine, and the graphics subsystem to provide motion information, and a motion biased foveated renderer communicatively coupled to the motion engine, the focus engine, the sense engine to adjust one or more parameters of the graphics subsystem based on one or more of the sense information, the focus information, and the motion information. Other embodiments are disclosed and claimed.
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公开(公告)号：US20180286016A1
公开(公告)日：2018-10-04
申请号：US15477003
申请日：2017-04-01
Applicant: Intel Corporation
Inventor： Tomer Bar-On , Hugues Labbe , Adam T. Lake , Kai Xiao , Ankur N. Shah , Johannes Guenther , Abhishek R. Appu , Joydeep Ray , Deepak S. Vembar , ElMoustapha Ould-Ahmed-Vall
CPC classification number: G06T5/002 , G06T1/20 , G06T9/00 , G06T11/40 , G06T15/005 , G06T15/503 , G06T2200/12
Abstract: Systems, apparatuses and methods may provide for technology that identifies, at an image post-processor, unresolved surface data and identifies, at the image post-processor, control data associated with the unresolved surface data. Additionally, the technology may resolve, at the image post-processor, the unresolved surface data and the control data into a final image.
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公开(公告)号：US20250069182A1
公开(公告)日：2025-02-27
申请号：US18814701
申请日：2024-08-26
Applicant: Intel Corporation
Inventor： Hugues Labbe , Tomer Bar-on , Kai Xiao , Ankur N. Shah , John G. Gierach
Abstract: An embodiment of a graphics apparatus may include a mask buffer to store a mask, a shader communicatively coupled to the mask buffer to apply the mask to a first shader pass, and a resolver communicatively coupled to the mask buffer to apply the mask to a resolve pass. The resolver may be configured to exclude a sample location not covered by the mask in the resolve pass. Other embodiments are disclosed and claimed.
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公开(公告)号：US12229867B2
公开(公告)日：2025-02-18
申请号：US18310015
申请日：2023-05-01
Applicant: Intel Corporation
Inventor： Hugues Labbe , Darrel Palke , Sherine Abdelhak , Jill Boyce , Varghese George , Scott Janus , Adam Lake , Zhijun Lei , Zhengmin Li , Mike MacPherson , Carl Marshall , Selvakumar Panneer , Prasoonkumar Surti , Karthik Veeramani , Deepak Vembar , Vallabhajosyula Srinivasa Somayazulu
Abstract: One embodiment provides a graphics processor comprising a block of execution resources, a cache memory, a cache memory prefetcher, and circuitry including a programmable neural network unit, the programmable neural network unit comprising a network hardware block including circuitry to perform neural network operations and activation operations for a layer of a neural network, the programmable neural network unit addressable by cores within the block of graphics cores and the neural network hardware block configured to perform operations associated with a neural network configured to determine a prefetch pattern for the cache memory prefetcher.
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公开(公告)号：US20240355032A1
公开(公告)日：2024-10-24
申请号：US18436688
申请日：2024-02-08
Applicant: Intel Corporation
Inventor： Atsuo Kuwahara , Deepak S. Vembar , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , Elmoustapha Ould-Ahmed-Vall , Prasoonkumar Surti , Murali Ramadoss
CPC classification number: G06T15/005 , G06F9/5027 , G06T15/04 , G06T15/80 , G06T17/10 , G06T2215/16
Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, and a graphics subsystem communicatively coupled to the application processor. The graphics subsystem may include a first graphics engine to process a graphics workload, and a second graphics engine to offload at least a portion of the graphics workload from the first graphics engine. The second graphics engine may include a low precision compute engine. The system may further include a wearable display housing the second graphics engine. Other embodiments are disclosed and claimed.
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Patent Agency Ranking
公开(公告)号：US11756247B2
公开(公告)日：2023-09-12
申请号：US17194819
申请日：2021-03-08
Applicant: Intel Corporation
Inventor： Deepak S. Vembar , Atsuo Kuwahara , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , ElMoustapha Ould-Ahmed-Vall , James M. Holland
IPC: G09G5/00 , G06T11/60 , G06T9/00 , H04N19/124 , H04N19/167 , H04N19/17 , H04N19/436 , H04N19/503
CPC classification number: G06T11/60 , G06T9/00 , H04N19/124 , H04N19/167 , H04N19/17 , H04N19/436 , H04N19/503
Abstract: An embodiment of a graphics apparatus may include a focus identifier to identify a focus area, and a color compressor to selectively compress color data based on the identified focus area. Another embodiment of a graphics apparatus may include a motion detector to detect motion of a real object, a motion predictor to predict a motion of the real object, and an object placer to place a virtual object relative to the real object based on the predicted motion of the real object. Another embodiment of a graphics apparatus may include a frame divider to divide a frame into viewports, a viewport prioritizer to prioritize the viewports, a renderer to render a viewport of the frame in order in accordance with the viewport priorities, and a viewport transmitter to transmit a completed rendered viewport. Other embodiments are disclosed and claimed.
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公开(公告)号：US11748302B2
公开(公告)日：2023-09-05
申请号：US17561427
申请日：2021-12-23
Applicant: Intel Corporation
Inventor： Altug Koker , Prasoonkumar Surti , David Puffer , Subramaniam Maiyuran , Guei-Yuan Lueh , Abhishek R. Appu , Joydeep Ray , Balaji Vembu , Tomer Bar-On , Andrew T. Lauritzen , Hugues Labbe , John G. Gierach , Gabor Liktor
IPC: G06F16/13 , G06F9/38 , G06F9/30 , G06F16/11 , G06F16/172 , G06F9/46 , G06F12/1036 , G06F12/1045 , G06F12/0831
CPC classification number: G06F16/13 , G06F9/30 , G06F9/38 , G06F9/3836 , G06F9/461 , G06F16/113 , G06F16/172 , G06F12/0831 , G06F12/1036 , G06F12/1045 , G06F2201/84
Abstract: In an example, an apparatus comprises a plurality of execution units, and a first memory communicatively couple to the plurality of execution units, wherein the first shared memory is shared by the plurality of execution units and a copy engine to copy context state data from at least a first of the plurality of execution units to the first shared memory. Other embodiments are also disclosed and claimed.
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公开(公告)号：US11520555B2
公开(公告)日：2022-12-06
申请号：US17162864
申请日：2021-01-29
Applicant: Intel Corporation
Inventor： Deepak S. Vembar , Atsuo Kuwahara , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Altug Koker , Michael Apodaca , Kai Xiao , Jeffery S. Boles , Adam T. Lake , David M. Cimini , Balaji Vembu , Elmoustapha Ould-Ahmed-Vall , Jacek Kwiatkowski , Philip R. Laws , Ankur N. Shah , Abhishek R. Appu , Joydeep Ray , Wenyin Fu , Nikos Kaburlasos , Prasoonkumar Surti , Bhushan M. Borole
IPC: G06F3/14 , G06F3/147 , G06T1/20 , G09G5/36 , H04L65/402 , G09G3/00 , H04L67/131
Abstract: An embodiment of a graphics apparatus may include a processor, memory communicatively coupled to the processor, and a collaboration engine communicatively coupled to the processor to identify a shared graphics component between two or more users in an environment, and share the shared graphics components with the two or more users in the environment. Embodiments of the collaboration engine may include one or more of a centralized sharer, a depth sharer, a shared preprocessor, a multi-port graphics subsystem, and a decode sharer. Other embodiments are disclosed and claimed.
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公开(公告)号：US20220222884A1
公开(公告)日：2022-07-14
申请号：US17529938
申请日：2021-11-18
Applicant: Intel Corporation
Inventor： Hugues Labbe , Tomer Bar-On , Gabor Liktor , Andrew T. Lauritzen , John G. Gierach
Abstract: Systems, apparatuses and methods may provide for technology that receives, at a topology shader in a graphics pipeline, an object description and generates, at the topology shader, a set of polygons based on the object description. Additionally, the set of polygons may be sent to a vertex shader.
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公开(公告)号：US11244479B2
公开(公告)日：2022-02-08
申请号：US16919839
申请日：2020-07-02
Applicant: Intel Corporation
Inventor： Karthik Vaidyanathan , Prasoonkumar Surti , Hugues Labbe , Atsuo Kuwahara , Sameer KP , Jonathan Kennedy , Murali Ramadoss , Michael Apodaca , Abhishek Venkatesh
Abstract: Systems, apparatuses and methods may provide for technology that determines a stencil value and uses the stencil value to control, via a stencil buffer, a coarse pixel size of a graphics pipeline. Additionally, the stencil value may include a first range of bits defining a first dimension of the coarse pixel size and a second range of bits defining a second dimension of the coarse pixel size. In one example, the coarse pixel size is controlled for a plurality of pixels on a per pixel basis.
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