Abstract:
A method and apparatus for providing an oscillating signal within a transmitter/receiver circuit is described. The transmitter/receiver circuit may include an oscillator that generates an oscillating signal that may be provided to a low power, low gain mixer of the transmitter/receiver circuit along a shorter circuit path that includes low power circuitry, such as low power buffers and low power frequency dividers. The oscillating signal may also be provided to a high power, high gain mixer along a longer circuit path that includes high power circuitry, such as high power buffers and high power frequency dividers. Specifically, the low power circuitry is adapted to consume less power in an ON state than the high power circuitry in an ON state, and the shorter circuit path has a shorter electrical path length than the longer circuit path.
Abstract:
A frequency divider (300) with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit (310a, 310b) and at least one duty cycle adjustment circuit (320a, 320b) coupled in a feedback loop. The divider circuit(s) receive a clock signal (input Clock) at a first frequency and provide at least one divided signal (Idivp, Idivn) at a second frequency, which is a fraction of the first frequency. The duty cycle adjustment circuit(s) adjust the duty cycle of the at least one divided signal and provide at least one duty cycle adjusted signal (ladjp, ladjn) to the divider circuit(s). The divider circuit(s) may include first and second latches (310a, 310b), and the duty cycle adjustment circuit(s) may include first and second duty cycle adjustment circuits (320a, 320b). The first and second latches and the first and second duty cycle adjustment circuits may be coupled in a feedback loop and may perform divide-by-2.
Abstract:
A wireless device supporting concurrent communication with multiple wireless systems of different radio access technologies (RATs) are disclosed. In an exemplary design, an apparatus includes first and second receivers supporting concurrent signal reception from wireless systems of different RATs. The first receiver receives a first downlink signal from a first wireless system of a first RAT. The second receiver receives a second downlink signal from a second wireless system of a second RAT, which is different from the first RAT. The first and second receivers may operate concurrently. The second receiver may be broadband and/or may support carrier aggregation. The apparatus may further include first and second local oscillator (LO) generators to generate LO signals for the first and second receivers, respectively, based on different divider ratios in order to mitigate voltage controlled oscillator (VCO) pulling.
Abstract:
Techniques for detecting and correcting phase discontinuity of a local oscillator (LO) signal are disclosed. In one design, a wireless device includes an LO generator and a phase detector. The LO generator generates an LO signal used for frequency conversion and is periodically powered on and off. The phase detector detects the phase of the LO signal when the LO generator is powered on. The detected phase of the LO signal is used to identify phase discontinuity of the LO signal. The wireless device may further include (i) a single-tone generator that generates a single-tone signal used to detect the phase of the LO signal, (ii) a downconverter that downconverts the single-tone signal with the LO signal and provides a downconverted signal used by the phase detector to detect the phase of LO signal, and (iii) phase corrector that corrects phase discontinuity of the LO signal in the analog domain or digital domain.
Abstract:
A receiver includes a low noise amplifier (LNA) and multiple pairs of mixers. The LNA receives and amplifies an LNA input signal and provides at least one LNA output signal. Each pair of mixers downconverts one of the at least one LNA output signal when enabled. Each pair of mixers may be selectively enabled or disabled, e.g., based on a mode selected from among multiple modes. In one design, the LNA includes multiple load sections coupled in parallel. Each load section may be selectively enabled or disabled, e.g., based on the selected mode. In one design, first and second pairs of mixers and first and second load sections may be enabled for a high linearity mode. The first pair of mixers and the first load section may be enabled and the second pair of mixers and the second load section may be disabled for a low linearity mode.
Abstract:
A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.
Abstract:
A method and apparatus for providing an oscillating signal within a transmitter/receiver circuit is described. The transmitter/receiver circuit may include an oscillator that generates an oscillating signal that may be provided to a low power, low gain mixer of the transmitter/receiver circuit along a shorter circuit path that includes low power circuitry, such as low power buffers and low power frequency dividers. The oscillating signal may also be provided to a high power, high gain mixer along a longer circuit path that includes high power circuitry, such as high power buffers and high power frequency dividers. Specifically, the low power circuitry is adapted to consume less power in an ON state than the high power circuitry in an ON state, and the shorter circuit path has a shorter electrical path length than the longer circuit path.