Pumped large full well pixel
    41.
    发明授权

    公开(公告)号:US11006058B2

    公开(公告)日:2021-05-11

    申请号:US16592051

    申请日:2019-10-03

    Abstract: A pixel includes an integration capacitor coupled between a system voltage and a pump voltage source and having a first side and a second side. The pixel can be operated to have a large full well by: storing charge from a photo-current source in the integration capacitor; reading out the integration capacitor; resetting the integration capacitor by connecting the capacitor to a column line through a select transistor; while resetting, setting the pump voltage source to the system voltage; and after resetting, setting the pump voltage to ground to create a negative voltage between the integration capacitor and column line.

    LOW POWER ANALOG-TO-DIGITAL CONVERTER
    44.
    发明申请

    公开(公告)号:US20180278263A1

    公开(公告)日:2018-09-27

    申请号:US15466417

    申请日:2017-03-22

    Abstract: A single slope analog to digital converter includes a comparator having a positive input and a negative input and a comparator output, a counter and a latch connected to an output of the counter and that includes a trigger input. Also included is a pulse generator coupled to the comparator output that produces a pulse of a defined width each time a signal on the negative input transitions from a voltage level that is below a voltage level on the positive input to a voltage level that is above the voltage level on the positive input.

    SELF-RECOVERING DIGITAL LATCH
    45.
    发明申请

    公开(公告)号:US20180109749A1

    公开(公告)日:2018-04-19

    申请号:US15297225

    申请日:2016-10-19

    Abstract: An electro-optical sensor chip assembly (SCA) that includes a detection device that includes an array of detector unit cells arranged in a matrix and that produce an electrical output in response to light. The SCA also includes an integrated control circuit in electrical communication with the detection device that includes a control word store to store a dataword. The control word store includes at least three sub-latches to redundantly store at least one bit of the dataword. The at least three sub-latches include a first sub-latch, a second sub-latch and a third sub-latch, each of the first sub-latch, the second sub-latch and the third sub-latch including an output and two recovery inputs, and the output of the first and third sub-latches are connected to the recovery inputs of the second sub-latch.

    DIGITAL UNIT CELL WITH ANALOG COUNTER ELEMENT

    公开(公告)号:US20170295333A1

    公开(公告)日:2017-10-12

    申请号:US15096572

    申请日:2016-04-12

    CPC classification number: H04N5/3698 G01J1/44 H04N5/37455 H04N5/378

    Abstract: According to one aspect, embodiments herein provide a digital unit cell comprising a photodiode, an integration capacitor, a comparator configured to compare a voltage across the integration capacitor with a threshold voltage and to generate a control signal at a first level each time the voltage across the integration capacitor is greater than the threshold voltage, a charge subtraction circuit configured to receive the control signal at the first level and to discharge accumulated charge on the integration capacitor each time the control signal at the first level is received, at least one analog counter configured to receive the control signal at the first level from the comparator and to decrease a count voltage by a fixed amount each time the control signal at the first level is received from the comparator, and a counter readout circuit configured to provide the count voltage to an image processing circuit.

    Gain adaptable unit cell
    47.
    发明授权

    公开(公告)号:US09762824B2

    公开(公告)日:2017-09-12

    申请号:US14984571

    申请日:2015-12-30

    CPC classification number: H04N5/3575 H04N5/3559 H04N5/37206 H04N5/37452

    Abstract: An imaging system unit cell and method of detecting an image. One example of an imaging system unit cell includes a photodetector configured to generate a photo-current in response to receiving optical radiation, a variable capacitance charge storing circuit in electrical communication with the photodetector and configured to integrate an electrical charge accumulated from the photo-current, a control circuit configured to monitor an integration voltage across the variable capacitance charge storing circuit and adjust a capacitance of the variable capacitance charge storing circuit based on the integration voltage, and an output configured to provide an output voltage based at least in part on the integrated voltage.

    PIN DIODE STRUCTURE HAVING SURFACE CHARGE SUPPRESSION
    48.
    发明申请
    PIN DIODE STRUCTURE HAVING SURFACE CHARGE SUPPRESSION 有权
    具有表面电荷抑制的PIN二极管结构

    公开(公告)号:US20150035014A1

    公开(公告)日:2015-02-05

    申请号:US13959081

    申请日:2013-08-05

    Abstract: A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes.

    Abstract translation: 一种半导体结构,具有:硅结构; 以及形成在所述硅结构中的多个横向间隔开的PiN二极管; 并且所述硅结构的表面被配置为减少穿过所述PiN二极管的反向偏置漏电流。 在一个实施例中,栅极电极结构设置在硅结构的表面上,栅极电极结构具有设置在相邻的二极管对之间的部分,栅极结构被偏置以防止通过二极管的漏电流。

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