中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

52 records (took 0.022 seconds)

    WAFER-LEVEL OPTO-ELECTRONIC TESTING APPARATUS AND METHOD
    41.
    发明申请
    WAFER-LEVEL OPTO-ELECTRONIC TESTING APPARATUS AND METHOD 审中-公开
    水平光电测试装置和方法

    公开(公告)号：WO2005086786A3

    公开(公告)日：2006-06-22

    申请号：PCT/US2005007473

    申请日：2005-03-08

    Applicant: SIOPTICAL INC ,  GOTHOSKAR PRAKASH ,  GHIRON MARGARET ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR ,  SHASTRI KALPENDU ,  PATHAK SOHAM ,  PIEDE DAVID ,  YANUSHEFSKI KATHERINE A

    Inventor： GOTHOSKAR PRAKASH ,  GHIRON MARGARET ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR ,  SHASTRI KALPENDU ,  PATHAK SOHAM ,  PIEDE DAVID ,  YANUSHEFSKI KATHERINE A

    IPC: G01R31/26

    CPC classification number: G02B6/30 ,  G02B6/34 ,  G02B2006/12107

    Abstract: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto­electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

    Abstract translation: 用于在绝缘体上硅（SOI）晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。 光束转向光学元件可以形成在测试元件上，并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件（例如，棱镜耦合器，光栅）之间的耦合。 此后，光学测试信号被引导到形成在SOI结构的顶层中的光波导中。 光电测试元件还包括多个电测试引脚，其定位成接触光电器件上的多个接合焊盘测试点并进行电测试操作。 光学测试信号结果可以转换为SOI结构内的电气表示，并因此作为电信号返回到测试元件。

    PLANAR WAVEGUIDE OPTICAL ISOLATOR IN THIN SILICON-ON-ISOLATOR (SOI) STRUCTURE
    42.
    发明申请
    PLANAR WAVEGUIDE OPTICAL ISOLATOR IN THIN SILICON-ON-ISOLATOR (SOI) STRUCTURE 审中-公开
    平面波导光隔离器（SILION-ON-ISOLATOR（SOI））结构

    公开(公告)号：WO2005057253A3

    公开(公告)日：2006-05-18

    申请号：PCT/US2004040600

    申请日：2004-12-06

    Applicant: SIOPTICAL INC ,  PIEDE DAVID ,  GHIRON MARGARET ,  GOTHOSKAR PRAKASH ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR ,  SHASTRI KALPENDU ,  PATHAK SOHAM ,  YANUSHEFSKI KATHERINE A ,  WAGNER HARVEY

    Inventor： PIEDE DAVID ,  GHIRON MARGARET ,  GOTHOSKAR PRAKASH ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR ,  SHASTRI KALPENDU ,  PATHAK SOHAM ,  YANUSHEFSKI KATHERINE A ,  WAGNER HARVEY

    IPC: G02B20060101 ,  G02B6/122 ,  G02B6/125 ,  G02B6/26 ,  G02B6/42

    CPC classification number: G02B6/1228 ,  G02B6/125 ,  G02B6/4207

    Abstract: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N-1 isolating waveguides). In another embodiment, the non-reciprocal structure comprises a waveguide expansion region including a tapered, mode-matching portion coupled to the output waveguide and an enlarged, non-mode matching portion coupled to the input waveguide such that a majority of a reflected signal will be mismatched with respect to the input waveguide section. By cascading a number of such planar SOI-based structures, increased isolation can be achieved - advantageously within a monolithic arrangement.

    Abstract translation: 在SOI结构的硅表面层内形成平面光隔离器。 正向信号被施加到隔离器的输入波导部分，然后通过非互易波导耦合区域传播到输出波导部分中。 后向信号经由输出波导部分进入，然后耦合到不可逆波导结构中，其中结构的几何结构仅将少量的反射信号耦合到输入波导部分中。 在一个实施例中，非互易结构包括N路定向耦合器（具有一个输出波导，一个输入波导和N-1个隔离波导）。 在另一个实施例中，不可逆结构包括波导扩展区域，其包括耦合到输出波导的锥形模式匹配部分和耦合到输入波导的放大的非模式匹配部分，使得反射信号的大部分将 相对于输入波导部分不匹配。 通过级联多个这种平面的基于SOI的结构，可以实现增加的隔离 - 有利地在单片布置中。

    INTERFACING MULTIPLE WAVELENGTH SOURCES TO THIN OPTICAL WAVEGUIDES UTILIZING EVANESCENT COUPLING
    43.
    发明申请
    INTERFACING MULTIPLE WAVELENGTH SOURCES TO THIN OPTICAL WAVEGUIDES UTILIZING EVANESCENT COUPLING 审中-公开
    将多个波长源连接起来，以减少利用光纤耦合的光波导

    公开(公告)号：WO2005024469A3

    公开(公告)日：2005-12-22

    申请号：PCT/US2004028829

    申请日：2004-09-07

    Applicant: SIOPTICAL INC ,  GHIRON MARGARET ,  GOTHOSKAR PRAKASH ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR ,  PATHAK SOHAM ,  SHASTRI KALPENDU ,  YANUSHEFSKI KATHERINE A

    Inventor： GHIRON MARGARET ,  GOTHOSKAR PRAKASH ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR ,  PATHAK SOHAM ,  SHASTRI KALPENDU ,  YANUSHEFSKI KATHERINE A

    IPC: G02B20060101 ,  G02B6/34

    CPC classification number: G02B6/12007 ,  G02B6/124 ,  G02B6/34

    Abstract: An arrangement for achieving and maintaining high efficiency coupling of light between a multi-wavelength optical signal and a relatively thin (e.g., sub-micron) silicon optical waveguide uses a prism coupler in association with an evanescent coupling layer. A grating structure having a period less than the wavelengths of transmission is formed in the coupling region (either formed in the silicon waveguide, evanescent coupling layer, prism coupler, or any combination thereof) so as to increase the effective refractive index "seen" by the multi -wavelength optical signal in the area where the beam exiting/entering the prism coupler intercepts the waveguide surface (referred to as the "prism coupling surface"). The period and/or duty cycle of the grating can be controlled to modify the effective refractive index profile in the direction away from the coupling region so as to reduce the effective refractive index from the relatively high value useful in multiwavelength coupling to the lower value associated with maintaining confinement of the optical signals within the surface waveguide structure, thus reducing reflections along the transition region.

    Abstract translation: 用于实现和保持多波长光信号和相对薄（例如亚微米）硅光波导之间的高效率耦合的布置使用与渐逝耦合层相关联的棱镜耦合器。 在耦合区域（或者形成在硅波导，ev逝耦合层，棱镜耦合器或其任何组合中）形成具有小于透射波长的周期的光栅结构，以便增加“看到”的有效折射率 在离开/进入棱镜耦合器的光束拦截波导表面（称为“棱镜耦合表面”）的区域中的多波长光信号。 可以控制光栅的周期和/或占空比以在远离耦合区域的方向上改变有效折射率分布，以便将有效折射率从在多波长耦合中可用的相对高的值减小到相关联的较低值 同时保持光信号在表面波导结构内的约束，从而减少沿着过渡区域的反射。

    MODE TRANSFORMATION AND LOSS REDUCTION IN SILICON WAVEGUIDE STRUCTURES UTILIZING TAPERED TRANSITION REGIONS
    44.
    发明申请
    MODE TRANSFORMATION AND LOSS REDUCTION IN SILICON WAVEGUIDE STRUCTURES UTILIZING TAPERED TRANSITION REGIONS 审中-公开
    硅波导结构中的模式转换和减少损耗转移区

    公开(公告)号：WO2004092782A3

    公开(公告)日：2005-09-09

    申请号：PCT/US2004011047

    申请日：2004-04-08

    Applicant: SIOPTICAL INC

    Inventor： GOTHOSKAR PRAKASH ,  GHIRON MARGARET ,  PATEL VIPULKUMAR ,  MONTGOMERY ROBERT KEITH ,  SHASTRI KALPENDU ,  PATHAK SOHAM ,  YANUSHEFSKI KATHERINE A

    IPC: G02B6/12 ,  G02B6/122 ,  G02B6/26

    CPC classification number: G02B6/1228 ,  G02B2006/12097

    Abstract: A low loss coupling arrangement between a slab/strip waveguide and a rib waveguide in an optical waveguiding structure formed on a silicon-on-insulator (SOI) platform utilizes tapered sections at the input and/or output of the rib waveguide to reduce loss. Optical reflections are reduced by using silicon tapers (either vertical tapers, horizontal tapers, or two-dimensional tapers) that gradually transition the effective index seen by an optical signal propagating along the slab/strip waveguide and subsequently into and out of the rib waveguide. Loss can be further reduced by using adiabatically contoured silicon regions at the input and output of the rib waveguide to reduce mode mismatch between the slab/strip waveguide and rib waveguide. In a preferred embodiment, concatenated tapered and adiabatic sections can be used to provide for reduced optical reflection loss and reduced optical mode mismatch.

    Abstract translation: 形成在绝缘体上硅（SOI）平台上的光波导结构中的板/条波导与肋波导之间的低损耗耦合布置在肋波导的输入和/或输出处采用锥形部分以减少损耗。 通过使用沿着板/条波导传播并随后进入肋波导的光学信号看到的有效折射率的硅锥度（垂直锥度，水平锥度或二维锥度）来减少光学反射。 通过在肋波导的输入和输出处使用绝热的轮廓的硅区域来减少损耗，以减少板/波导管和肋波导之间的模式失配。 在优选实施例中，可以使用级联的锥形和绝热部分来提供减少的光学反射损失和减小的光学模式失配。

    SILICON MODULATOR OFFSET TUNING ARRANGEMENT
    47.
    发明申请
    SILICON MODULATOR OFFSET TUNING ARRANGEMENT 审中-公开
    硅调制器偏移调谐装置

    公开(公告)号：WO2007146233A3

    公开(公告)日：2008-08-07

    申请号：PCT/US2007013692

    申请日：2007-06-11

    Applicant: SIOPTICAL INC ,  MONTGOMERY ROBERT KEITH ,  GHIRON MARGARET ,  GOTHOSKAR PRAKASH ,  MOSINSKIS PAULIUS MINDAUGAS ,  PATEL VIPULKUMAR ,  SHASTRI KALPENDU ,  WEBSTER MARK

    Inventor： MONTGOMERY ROBERT KEITH ,  GHIRON MARGARET ,  GOTHOSKAR PRAKASH ,  MOSINSKIS PAULIUS MINDAUGAS ,  PATEL VIPULKUMAR ,  SHASTRI KALPENDU ,  WEBSTER MARK

    IPC: G02B6/12 ,  G02F1/295

    CPC classification number: G02F1/025 ,  G02F1/0147 ,  G02F1/225 ,  G02F2201/126

    Abstract: A silicon-based optical modulator structure (20) includes one or more separate localized heating elements (22/24) for changing the refractive index of an associated portion of the structure and thereby providing corrective adjustments to address unwanted variations i device performance Heating is provided by thermo-optic devices such as, for example, silicon- based resistors, silicide resistors, forward-biased PN junctions, and the like, where any of these structures may easily be incorporated with a silicon-based optical modulator The application of a DC voltage to any of these structures will generate heat, which then transfers into the waveguiding are The increase in local temperature of the waveguiding area will, in turn, increase the refractive index of the waveguiding in the area Control of the applied DC voltage results in controlling the refractive index

    Abstract translation: 硅基光调制器结构（20）包括一个或多个单独的局部加热元件（22/24），用于改变结构的相关部分的折射率，从而提供校正调整以解决不期望的变化i器件性能提供加热 通过诸如硅基电阻器，硅化物电阻器，正向偏置PN结等的热光器件，其中任何这些结构可以容易地与硅基光学调制器结合使用DC 这些结构中的任何一个的电压将产生热量，然后传递到波导中。波导区域的局部温度的增加又将增加该区域中波导的折射率。控制所施加的DC电压导致控制 折射率

    SOI-BASED OPTO-ELECTRONIC DEVICE INCLUDING CORRUGATED ACTIVE REGION
    48.
    发明申请
    SOI-BASED OPTO-ELECTRONIC DEVICE INCLUDING CORRUGATED ACTIVE REGION 审中-公开
    基于SOI的光电设备，包括修复的活动区域

    公开(公告)号：WO2007146235A3

    公开(公告)日：2008-04-24

    申请号：PCT/US2007013694

    申请日：2007-06-11

    Applicant: SIOPTICAL INC ,  MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR

    Inventor： MONTGOMERY ROBERT KEITH ,  PATEL VIPULKUMAR

    IPC: G02F1/025

    CPC classification number: G02F1/025 ,  G02F1/2257

    Abstract: The surface silicon layer (SOI layer) of an SOI-based optical modulator is processed to exhibit a corrugated surface along the direction of optical signal propagation. The required dielectric layer (i.e., relatively thin "gate oxide") is formed over the corrugated structure in a manner that preserves the corrugated topology. A second silicon layer, required to form the modulator structure, is then formed over the gate oxide in a manner that follows the corrugated topology, where the overlapping portion of the corrugated SOI layer, gate oxide and second silicon layer defines the active region of the modulator. The utilization of the corrugated active region increases the area over which optical field intensity will overlap with the free carrier modulation region, improving the modulator's efficiency.

    Abstract translation: 处理基于SOI的光调制器的表面硅层（SOI层）沿着光信号传播的方向呈现波纹状表面。 所需的电介质层（即相对较薄的“栅极氧化物”）以保持波纹拓扑的方式形成在波纹状结构上。 形成调制器结构所需的第二硅层然后以跟随波纹拓扑的方式形成在栅极氧化物上，其中波纹SOI层，栅极氧化物和第二硅层的重叠部分限定了 调制器。 波纹有源区域的利用增加了光场强度将与自由载波调制区域重叠的面积，从而提高了调制器的效率。

    VERTICAL STACKING OF MULTIPLE INTEGRATED CIRCUITS INCLUDING SOI-BASED OPTICAL COMPONENTS
    49.
    发明申请
    VERTICAL STACKING OF MULTIPLE INTEGRATED CIRCUITS INCLUDING SOI-BASED OPTICAL COMPONENTS 审中-公开
    多层集成电路的垂直堆叠，包括基于SOI的光学元件

    公开(公告)号：WO2006084237A8

    公开(公告)日：2007-09-20

    申请号：PCT/US2006004108

    申请日：2006-02-04

    Applicant: SIOPTICAL INC ,  SHASTRI KALPENDU ,  PATEL VIPULKUMAR ,  PIEDE DAVE ,  FANGMAN JOHN

    Inventor： SHASTRI KALPENDU ,  PATEL VIPULKUMAR ,  PIEDE DAVE ,  FANGMAN JOHN

    IPC: G02B6/12

    CPC classification number: G02B6/42 ,  G02B6/4214 ,  G02B6/43 ,  G02F1/025 ,  H01L31/12

    Abstract: A vertical stack of integrated circuits includes at least one CMOS electronic integrated circuit (IC), an SOI-based opto-electronic integrated circuit structure, and an optical input/output coupling element. A plurality of metalized vias may be formed through the thickness of the stack so that electrical connections can be made between each integrated circuit. Various types of optical input/output coupling can be used, such as prism coupling, gratings, inverse tapers, and the like. By separating the optical and electrical functions onto separate ICs, the functionalities of each may be modified without requiring a re-design of the remaining system. By virtue of using SOI-based opto-electronics with the CMOS electronic ICs, a portion of the SOI structure may be exposed to provide access to the waveguiding SOI layer for optical coupling purposes.

    Abstract translation: 集成电路的垂直堆叠包括至少一个CMOS电子集成电路（IC），基于SOI的光电集成电路结构以及光输入/输出耦合元件。 可以通过堆叠的厚度形成多个金属化通孔，使得可以在每个集成电路之间进行电连接。 可以使用各种类型的光输入/输出耦合，例如棱镜耦合，光栅，逆锥等。 通过将光学和电气功能分离到单独的IC上，可以修改每个功能，而不需要重新设计剩余的系统。 由于使用具有CMOS电子IC的基于SOI的光电子器件，SOI结构的一部分可能被暴露以提供对波导SOI层的访问以用于光学耦合目的。

Patent Agency Ranking