公开(公告)号：JPH05152258A

公开(公告)日：1993-06-18

申请号：JP33802791

申请日：1991-11-28

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/205 ,  H01L21/302 ,  H01L21/3065

Abstract: PURPOSE:To prevent deposition of particles on the rear of a wafer in low- temperature etching. CONSTITUTION:In the case of silicon trench etching with S2F2 gas by using a magnetic field microwave plasma etching system 100, S2F2 gas is introduced and subjected to reserve discharge with no wafer 8 set, so that the surface of a wafer mount electrode 9 is coated with an S(sulfur)deposit layer. Thus, even when the wafer 8 is held close on the wafer mount electrode 9, the substance which deposits on the rear is only S, other particles whose composition is unknown do not directly contact. When after etching ends the wafer 8 is transferred to a postheating chamber 14 and sprayed with heated N2 gas from both faces, S can easily be sublimed away. For storage of the wafer 8 into a cassette 19 in an unload cassette chamber 18, there is no possibility of contaminating other wafers.

公开(公告)号：JPH05136281A

公开(公告)日：1993-06-01

申请号：JP29531491

申请日：1991-11-12

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522

Abstract: PURPOSE:To restrain intergranular diffusion of Al without increasing a wiring width by a simple process by forming an opening part which passes through an interlaminar film, a first aluminum film and a barrier metallic film in an opening part formation position for wiring of an interlaminar film. CONSTITUTION:A first aluminum film 3 is deposited on a barrier metal film 2 formed on a foundation substrate 1, and the aluminum film 3 and the barrier metal film 2 are patterned to form a wiring pattern. An interlaminar film 4 is formed on the foundation substrate 1 and the wiring pattern. An opening part 5 whose diameter is almost the same as a width of the aluminum film 3 which cuts a wiring pattern of the aluminum film 3 into pieces is formed at a via hole formation position of the interlaminar film 4 passing through the interlaminar film 4, the aluminum film 3 and the barrier metal film 2. A second aluminum film 6 is buried inside the opening part 5 to connect the cut first aluminum film 3 electrically and a wiring material of the via hole is buried.

公开(公告)号：JPH05121362A

公开(公告)日：1993-05-18

申请号：JP30666691

申请日：1991-10-25

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: C23C14/35 ,  C23C16/50 ,  C23C16/511 ,  C23F4/00 ,  C30B25/08 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H05H1/18

Abstract: PURPOSE:To reduce the particles adhering to the surface of a semiconductor wafer by providing an adhesion preventive member, whose surface has many projections, at least in the vicinity of the part where plasma chemical reaction occurs and which is on the surface of the substrate inside an ECR plasma reaction chamber. CONSTITUTION:The adhesion preventive member 14, which surrounds the space where ECR plasma chemical reaction occurs above the semiconductor wafer 8 inside an ECR plasma reaction chamber 6, is provided on the inner surface, and has a number of, for example, integral hexagonal honeycombed-pattern projections 15. The particles tending to adhere to the place excluding the surface of the wafer 8 in the plasma processing mostly adhere to the inner surface of the adhesion preventive part 14. The particles hardly separate because of the projections. Since the adhesion preventive part 14 is replaceable, when the adhering reaction products 12 become thick, it can be replaced.

公开(公告)号：JPH05102321A

公开(公告)日：1993-04-23

申请号：JP14213391

申请日：1991-06-13

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522

Abstract: PURPOSE:To lower the contact resistance of plug-in longitudinal wiring to upper- layer wiring. CONSTITUTION:In the method of forming multilayer wiring, a connecting hole 6 which is passed down to lower-layer wiring 11 nearly perpendicularly to the laying direction of upper-layer wiring 14 is formed in order to electrically connect the lower-layer wiring 11 including a diffusion layer to at least one upper-layer wiring 14 formed on it and a conductor is filled into the connecting hole 6. In the formation method, at least one part of at least one upper-layer wiring layer 14 is etched toward the outer circumferential direction with reference to the edge face of the connecting hole 6.

公开(公告)号：JPH0536627A

公开(公告)日：1993-02-12

申请号：JP21421391

申请日：1991-08-01

Applicant: SONY CORP

Inventor： HOSHINO KAZUHIRO ,  SATO JUNICHI

IPC: H01L21/28

Abstract: PURPOSE:To improve reliability by uniformly and quickly burying Al based material in a contact part of high aspect ratio which part has barrier metal structure. CONSTITUTION:After a contact hole 3a formed in an SiO2 interlayer insulating film 3 is covered with barrier metal 7 composed of a Ti layer 4, a TiOxNy layer 5 and a TiNx layer 6, and filled with an Al-1% Si layer 8 by a high temperature sputtering method. Since the uppermost surface of the barrier metal is constituted of the TiNx layer 6 containing no oxygen, high wettability to the Al-1% Si layer 8 is obtained, and quick burying is enabled without generating cavities. As the result of the above quick film formation, the uptake of degassing component is reduced, and electromigration resistance is improved. By arranging the TiOxNy layer 5 having structure wherein oxygen is segregated on the grain boundary of TiNx, high barrier quality also can be obtained.

公开(公告)号：JPH04370927A

公开(公告)日：1992-12-24

申请号：JP14753591

申请日：1991-06-19

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/41

Abstract: PURPOSE:To provide a method of forming a self-alignment contact by a method wherein the self-alignment part of a semiconductor device is decreased in size, accordingly, the area of a cell can be reduced. CONSTITUTION:In a method, wherein a connection hole for making an electrical connection with an upper layer wiring is formed on a lower layer wiring (source and brain regions) 6 including a diffused layer formed in a semiconductor substrate 1 in a self-alignment manner and thereafter, a conductor (a self-alignment contact part) 8 is provided in the connection hole to form a self-alignment contact; when the connection hole is formed, a connection hole (a contact hole) 20 having at least one part of a large horizontal sectional area on the substrate 1 side is formed and thereafter, the filling of the conductor 8 in the hole 20 is performed by a selective metal CVD method.

公开(公告)号：JPH04364733A

公开(公告)日：1992-12-17

申请号：JP13987191

申请日：1991-06-12

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522

Abstract: PURPOSE:To improve workability and reliability by suppressing aluminum grain diffusion in aluminum wirings. CONSTITUTION:After an aluminum film 2 spread over an SiO2 film 1 is patterned, aluminum crystal grains are selectively etched under the condition of 40 deg.C, 10-20sec using phosphoric acid (H3PO4) and nitric acid (HNO3). Next, tungsten 4 is selectively grown at the grain boundary under the condition of WF6/SiH4=10/7SCCM0.2Torr, 260 deg.C to deposit tungsten in the grain boundary of aluminum crystals and in the outer periphery of aluminum wirings. This process can suppress aluminum grain diffusion.

公开(公告)号：JPH04359452A

公开(公告)日：1992-12-11

申请号：JP13312291

申请日：1991-06-05

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522

Abstract: PURPOSE:To achieve the wiring formation which can be processed simply by preventing the stress migration and eletromigration of its aluminum wiring. CONSTITUTION:A barrier metal film 2 and an aluminum film 3 are formed in turn on a base board 1. An interlayer film 4 is formed subsequent to the formation of a wiring pattern by patterning. Then, a through hole 5 which penetrates the interlayer film 4, aluminum film 3, and barrier metal film 2 is formed in a position where a via hole is formed. In the through hole 5, tungsten 6 is deposited by a selective tungsten CVD to fill it up. Thus, the aluminum film 6 is cut by the tungsten 6 and the Al diffusion at grain boundaries is suppressed thereby to prevent the generation of the stress migration and electromigration.

公开(公告)号：JPH04343422A

公开(公告)日：1992-11-30

申请号：JP14564091

申请日：1991-05-21

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L29/78 ,  H05H1/46

Abstract: PURPOSE:To provide a carbon-free clean dry etching method which prevents generation of carbon from a photoresist and can perform etching of a layer to be etched such as polysilicon and an insulation layer such as a ground SiO2 with a high selectivity ratio. CONSTITUTION:A photoresist pattern 4 is formed on a layer 2 to be etched on a substrate 1 and a sulfur layer 5 is formed on a surface of the resist pattern for preventing generation of carbon from the photoresist 4. When an insulation film 3 is formed below the layer 2 to be etched, it is necessary that the sulfur layer 5 is formed on a surface of the resist pattern 4 when at least the layer 2 to be etched is to be overetched. It is desirable that a reaction gas to be used when forming the sulfur layer is a reaction gas containing at least one type of compound which is selected from a group which consists of S2F2, SF2, SF4, S2F10, S3Cl2, S2Cl2, SCl2, SCl4, SCl5, S2Cl10, and SOCl2.

公开(公告)号：JPH04245661A

公开(公告)日：1992-09-02

申请号：JP1065291

申请日：1991-01-31

Applicant: SONY CORP

Inventor： SATO JUNICHI

IPC: H01L21/205 ,  H01L21/265 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/677 ,  H01L21/68

Abstract: PURPOSE:To suppress cross-contamination between processes in a multichamber processing apparatus. CONSTITUTION:A plurality of process chambers for processing a plurality of wafers are connected in parallel to a transfer chamber through gate valves and a transfer means for loading and unloading wafers between the transfer chamber and process chamber through the gate valves is provided. Different wafer supporting portions for each process are selectively provided by using wafer supporting members 30A to 30C to such transfer means.