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    MANUFACTURE OF SOLID IMAGE PICKUP ELEMENT
    41.
    发明专利
    MANUFACTURE OF SOLID IMAGE PICKUP ELEMENT 失效

    公开(公告)号：JPS5646571A

    公开(公告)日：1981-04-27

    申请号：JP12355279

    申请日：1979-09-26

    Applicant: SONY CORP

    Inventor： ABE MOTOAKI ,  HASHIMOTO TAKEO ,  SHIMADA TAKASHI

    IPC: H01L27/148 ,  H04N5/335 ,  H04N5/341 ,  H04N5/359 ,  H04N5/369 ,  H04N5/3728

    Abstract: PURPOSE:To obtain a solid image pickup element having high integrity by forming an overflow drain region and an overflow gate region for controlling a blooming by a self-alignment of a selective oxidation technique. CONSTITUTION:An SiO2 film 22 and an Si3N4 film 23 are laminated on a P type semiconductor substrate 1, a photoresist film 24 is covered on the whole surface thereof, and windows 25, 26 are opened corresponding to a channel stopper region 5 and an overflow control gate region 4. Subsequently, P type impurity ions are implanted, P type stopper region 5 and a gate region 4 are formed thereon, and the film 23 exposed thereon is etched and removed. Thereafter, the layer 24 is removed, is selectively oxidized, and thick SiO2 layer 27 is formed on the regions 5, 4, the residual layer 24 is removed, and a resist layer 28 is formed over to the half of the layer 27 from the layer 22 exposed. Then, the layers 28, 27 as masks N type impurity ions are injected thereto, and the portion between the regions 4 and 5 is formed with an N type overflow drain region 2.

    MANUFACTURE OF SEMICONDUCTOR DEVICE
    42.
    发明专利
    MANUFACTURE OF SEMICONDUCTOR DEVICE 失效

    公开(公告)号：JPS5638841A

    公开(公告)日：1981-04-14

    申请号：JP11443579

    申请日：1979-09-06

    Applicant: SONY CORP

    Inventor： SHIMADA TAKASHI ,  OOTSU KOUJI

    IPC: H01L21/768 ,  H01L23/522 ,  H01L21/90

    Abstract: PURPOSE:To conform a highly integrated circuit by shortening the distance between the wiring of two layer wiring structure and the window without making it short circuit by a method wherein the window for leading out electrode on a diffused layer is formed by selfalignment using a nitrided silicon film. CONSTITUTION:After an N type diffused layer 1 is formed on a surface of a P type silicon semiconductor substrate 2, the nitrided silicon film 11 having oxidation proof is selectively formed on the surface corresponding to the leading out electrode portion on the diffused layer 1. Next thereto, an oxidated silicon film 12 is formed on the semiconductor surface other than the nitrided film 11, a gate oxidation film and a window 13 are formed thereupon. Then, a polcrystalline layer 4 that an impurity has doped is selectively formed to form the first wiring layer, the surface thereof is heat oxidized to form the oxidized silicon layer 14. Thereafter, the nitrided silicon film 11 is removed to make the electrode leading out window 6 and the impurity doped polcrystalline silicon layer 7 is formed as the second wiring layer.

    MANUFACTURE OF CCD PICKUP DEVICE
    43.
    发明专利
    MANUFACTURE OF CCD PICKUP DEVICE 失效

    公开(公告)号：JPS55166385A

    公开(公告)日：1980-12-25

    申请号：JP7498879

    申请日：1979-06-14

    Applicant: SONY CORP

    Inventor： HAGIWARA YOSHIAKI ,  SHIMADA TAKASHI ,  HIRATA YOSHIMI

    IPC: H01L27/148 ,  H04N5/335 ,  H04N5/341 ,  H04N5/369 ,  H04N5/372 ,  H04N5/374

    Abstract: PURPOSE:To facilitate the manufacture of the MOS transistor as well as increase the overall reliability, by securing the simultaneous formation of the MOS transistors at the output part via the forming process of the charge transfer region at the pickup part. CONSTITUTION:N -layers 29 and 30 forming the source and the drain are formed to reach under gate electrode 44 and at the output part when the buried channel is formed by the ion injection at the pickup part. Then the silicon poly-crystal is formed into source and drain electrodes 36 and 37 to be deposited directly to layers 29 and 30 when the 1st transfer electrode 35 is formed next via the impurity-doped silicon poly-crystal. Then the heat treatment is given to form N -layers 38 and 39 via the impurity diffusion from the silicon poly-crystal, and gate electrode 44 is formed on gate oxide film 32' in the forming process of the subsequent 2nd transfer electrode 43. As a result, the high-density ion injecting process to form the source and drain regions can be omitted, and accordingly the resist soiling can be avoided.

    INSULATED GATE TYPE SEMICONDUCTOR DEVICE
    44.
    发明专利
    INSULATED GATE TYPE SEMICONDUCTOR DEVICE 失效

    公开(公告)号：JPS54162974A

    公开(公告)日：1979-12-25

    申请号：JP7236578

    申请日：1978-06-15

    Applicant: SONY CORP

    Inventor： SHIMADA TAKASHI ,  OOTSU KOUJI

    IPC: H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/417

    Abstract: PURPOSE:To obtain a high-speed and large-current semiconductor device which causes no step break with the low resistance by piling the Si layer and the folw fusing point metal layer onto the gate insulated film. CONSTITUTION:The window is drilled to SiO26 on N-type Si substrate 1 and with coating of BSG10. Selective opening 11 is given to BSG10 with the heat treatment to form SiO2 thin film 4 plus P-layer 2 and 3. Then window 12 and 13 are formed on layer 2 and 3, and doped poly Si layer 14 is provided through the CVD method. As a result, layer 14 can be coated well even at the rear side wall with no step break caused with an extremely thin thickness. Then Al 15 or the like is evaporated about 2000Angstrom on layer 14 of about 3000Angstrom or less, and layer 14 and 15 are etched selectively to form wiring pattern 7. After this, CVDSiO28 is formed and wiring pattern 9 of Al and the like is laminated for connection to pattern 9. In such constitution, the lamination of layer 14 and 15 features a low electric resistance with no step break caused, thus obtaining a highly reliable device.

    NOR TYPE FLASH MEMORY
    48.
    发明专利
    NOR TYPE FLASH MEMORY 失效

    公开(公告)号：JPH06334156A

    公开(公告)日：1994-12-02

    申请号：JP14306993

    申请日：1993-05-21

    Applicant: SONY CORP

    Inventor： SHIMADA TAKASHI

    IPC: G11C17/00 ,  G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  G11C16/02 ,  G11C16/06

    Abstract: PURPOSE:To overlap a ground line a and a bit line on a semiconductor layer as an active layer and enhance the degree of integration by making the area of a memory cell small. CONSTITUTION:The upper layer and the lower layer of a Si layer 44 as the active layer of a transistor 16 for memory cell are extended the AlSiCu film 72 and Ti/TiN/Ti film 71 as the bit line and the tungsten polyside film 38 as the ground line. The ground line is connected to the source 14 of the transistor 16 through an impurity region 64 provided through the Si layer 44 and the bit line is connected to the drain 15 of the transistor 16 through a contact hole 62.

    PRODUCTION OF PHASE SHIFT MASK
    49.
    发明专利
    PRODUCTION OF PHASE SHIFT MASK 失效

    公开(公告)号：JPH0667402A

    公开(公告)日：1994-03-11

    申请号：JP21147991

    申请日：1991-07-29

    Applicant: SONY CORP

    Inventor： SHIMADA TAKASHI

    IPC: G03F1/30 ,  G03F1/68 ,  G03F1/80 ,  H01L21/027 ,  G03F1/08

    Abstract: PURPOSE:To provide the technique of obtaining the phase shift mask having high reliability which can prevent charge up and can suppress the overetching of a substrate at the time of forming patterns for forming phase shift parts. CONSTITUTION:A first conductive layer 2 where the selection ratio at the time of etching to a transparent substrate 1 is formed on light shielding parts 10 formed on the substrate 1 and the parts of the first conductive layer 2 corresponding to the points to be formed with the phase shift parts 11 are at least etched away and a phase shift material film 3 is formed; thereafter, the phase shift material film 3 is patterned to form the phase shift parts 11 after a second conductive layer 4 is formed. The second conductive layer 4 in the parts exclusive of the points to be formed with the phase shift parts 11 is otherwise etched after the formation of the second conductive layer 4 and the phase shift material film 3 is patterned by etching. The thicknesses of the first and second conductive layers 2, 4 after the patterning are nearly equal to each other.

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