公开(公告)号：US12095000B2

公开(公告)日：2024-09-17

申请号：US17035913

申请日：2020-09-29

Applicant: Sensor Electronic Technology, Inc.

Inventor： Michael Shur ,  Grigory Simin ,  Alexander Dobrinsky

IPC: H01L33/06 ,  G06F30/30 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/0232 ,  H01L31/0304 ,  H01L31/0352 ,  H01L31/0392 ,  H01L31/18 ,  H01L33/00 ,  H01L33/08 ,  H01L33/12 ,  H01L33/30 ,  H01L33/32 ,  H01L33/40 ,  H01L33/42 ,  H01L33/46 ,  H01L33/64 ,  H01L33/38 ,  H01S5/30 ,  H01S5/343

CPC classification number: H01L33/06 ,  G06F30/30 ,  H01L31/02005 ,  H01L31/022466 ,  H01L31/02327 ,  H01L31/03048 ,  H01L31/035227 ,  H01L31/035236 ,  H01L31/0392 ,  H01L31/1848 ,  H01L31/1852 ,  H01L33/007 ,  H01L33/08 ,  H01L33/12 ,  H01L33/30 ,  H01L33/32 ,  H01L33/405 ,  H01L33/42 ,  H01L33/46 ,  H01L33/642 ,  H01L33/382 ,  H01L2933/0091 ,  H01S5/3054 ,  H01S5/3086 ,  H01S5/34333

Abstract: An optoelectronic device configured for improved light extraction through a region of the device other than the substrate is described. A group III nitride semiconductor layer of a first polarity is located on the substrate and an active region can be located on the group III nitride semiconductor layer. A group III nitride semiconductor layer of a second polarity, different from the first polarity, can located adjacent to the active region. A first contact can directly contact the group III nitride semiconductor layer of the first polarity and a second contact can directly contact the group III nitride semiconductor layer of the second polarity. Each of the first and second contacts can include a plurality of openings extending entirely there through and the first and second contacts can form a photonic crystal structure. Some or all of the group III nitride semiconductor layers can be located in nanostructures.

公开(公告)号：US20220231199A1

公开(公告)日：2022-07-21

申请号：US17715238

申请日：2022-04-07

Applicant: Sensor Electronic Technology, Inc.

Inventor： Michael Shur ,  Grigory Simin ,  Alexander Dobrinsky

IPC: H01L33/48 ,  H01L27/12 ,  H01L33/64 ,  H01L33/62 ,  H01L27/15

Abstract: A mounting structure for mounting a set of optoelectronic devices is provided. A mounting structure for a set of optoelectronic devices can include: a body formed of an insulating material; and a heatsink element embedded within the body. A heatsink can be located adjacent to the mounting structure. The set of optoelectronic devices can be mounted on a side of the mounting structure opposite of the heatsink.

公开(公告)号：US11329196B2

公开(公告)日：2022-05-10

申请号：US15926166

申请日：2018-03-20

Applicant: Sensor Electronic Technology, Inc.

Inventor： Michael Shur ,  Grigory Simin ,  Alexander Dobrinsky

IPC: H01L33/48 ,  H01L27/12 ,  H01L33/64 ,  H01L33/62 ,  H01L27/15

Abstract: A mounting structure for mounting a set of optoelectronic devices is provided. A mounting structure for a set of optoelectronic devices can include: a body formed of an insulating material; and a heatsink element embedded within the body. A heatsink can be located adjacent to the mounting structure. The set of optoelectronic devices can be mounted on a side of the mounting structure opposite of the heatsink.

公开(公告)号：US10790410B2

公开(公告)日：2020-09-29

申请号：US15331895

申请日：2016-10-23

Applicant: Sensor Electronic Technology, Inc.

Inventor： Michael Shur ,  Grigory Simin ,  Alexander Dobrinsky

IPC: H01L33/06 ,  H01L33/32 ,  H01L33/40 ,  H01L33/64 ,  G06F30/30 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/0232 ,  H01L31/0304 ,  H01L31/0352 ,  H01L31/0392 ,  H01L31/18 ,  H01L33/00 ,  H01L33/08 ,  H01L33/12 ,  H01L33/30 ,  H01L33/42 ,  H01L33/46 ,  H01L33/38 ,  H01S5/30 ,  H01S5/343

Abstract: An optoelectronic device configured for improved light extraction through a region of the device other than the substrate is described. A group III nitride semiconductor layer of a first polarity is located on the substrate and an active region can be located on the group III nitride semiconductor layer. A group III nitride semiconductor layer of a second polarity, different from the first polarity, can located adjacent to the active region. A first contact can directly contact the group III nitride semiconductor layer of the first polarity and a second contact can directly contact the group III nitride semiconductor layer of the second polarity. Each of the first and second contacts can include a plurality of openings extending entirely there through and the first and second contacts can form a photonic crystal structure. Some or all of the group III nitride semiconductor layers can be located in nanostructures.

公开(公告)号：US10237929B2

公开(公告)日：2019-03-19

申请号：US15492351

申请日：2017-04-20

Applicant: Sensor Electronic Technology, Inc.

Inventor： Grigory Simin ,  Michael Shur ,  Alexander Dobrinsky

IPC: H05B33/08 ,  H01L25/16 ,  H01L33/60

Abstract: A solid-state light source (SSLS) with an integrated electronic modulator is described. A device can include a SSLS having an active p-n junction region is formed within the SSLS for electron-hole pair recombination and light emission. the active p-n junction region can include a n-type semiconductor layer, a p-type semiconductor layer and a light generating structure formed there between. A pair of current supply electrodes can be formed to receive a drive current from a current supply source that drives the SSLS. A field-effect transistor (FET) modulator can be monolithically integrated with the SSLS for modulation thereof. The FET modulator can receive a modulation voltage from a modulation voltage source. The modulation voltage includes voltage pulses having a pulse amplitude and polarity to turn on and off current flowing through the FET modulator. These voltage pulses enable the FET modulator to control the drive current supplied to the SSLS.

公开(公告)号：US10178726B2

公开(公告)日：2019-01-08

申请号：US15856625

申请日：2017-12-28

Applicant: Sensor Electronic Technology, Inc.

Inventor： Grigory Simin ,  Michael Shur ,  Alexander Dobrinsky ,  Maxim S. Shatalov

IPC: H05B33/08 ,  H01L27/15 ,  H05B37/02

Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.

公开(公告)号：US10090438B2

公开(公告)日：2018-10-02

申请号：US15678481

申请日：2017-08-16

Applicant: Sensor Electronic Technology, Inc.

Inventor： Grigory Simin ,  Michael Shur ,  Alexander Dobrinsky

IPC: H01L33/24 ,  H01L33/06 ,  H01L33/08 ,  H01L33/14 ,  H01L33/32 ,  H01L33/40 ,  H01L33/44

Abstract: An opto-electronic device with two-dimensional injection layers is described. The device can include a semiconductor structure with a semiconductor layer having one of an n-type semiconductor layer or a p-type semiconductor layer, and a light generating structure formed on the semiconductor layer. A set of tilted semiconductor heterostructures is formed over the semiconductor structure. Each tilted semiconductor heterostructure includes a core region, a set of shell regions adjoining a sidewall of the core region, and a pair of two-dimensional carrier accumulation (2DCA) layers. Each 2DCA layer is formed at a heterointerface between one of the sidewalls of the core region and one of the shell regions. The sidewalls of the core region, the shell regions, and the 2DCA layers each having a sloping surface, wherein each 2DCA layer forms an angle with a surface of the semiconductor structure.

公开(公告)号：US20180124887A1

公开(公告)日：2018-05-03

申请号：US15856625

申请日：2017-12-28

Applicant: Sensor Electronic Technology, Inc.

Inventor： Grigory Simin ,  Michael Shur ,  Alexander Dobrinsky ,  Maxim S. Shatalov

IPC: H05B33/08 ,  H05B37/02 ,  H01L27/15

CPC classification number: H05B33/0842 ,  H01L27/15 ,  H05B33/0809 ,  H05B33/0851 ,  H05B37/0227

Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.

公开(公告)号：US20180062040A1

公开(公告)日：2018-03-01

申请号：US15678481

申请日：2017-08-16

Applicant: Sensor Electronic Technology, Inc.

Inventor： Grigory Simin ,  Michael Shur ,  Alexander Dobrinsky

IPC: H01L33/24 ,  H01L33/06 ,  H01L33/08 ,  H01L33/14 ,  H01L33/32 ,  H01L33/40 ,  H01L33/44

CPC classification number: H01L33/24 ,  H01L33/06 ,  H01L33/08 ,  H01L33/14 ,  H01L33/32 ,  H01L33/405 ,  H01L33/44 ,  H01L2933/0091

Abstract: An opto-electronic device with two-dimensional injection layers is described. The device can include a semiconductor structure with a semiconductor layer having one of an n-type semiconductor layer or a p-type semiconductor layer, and a light generating structure formed on the semiconductor layer. A set of tilted semiconductor heterostructures is formed over the semiconductor structure. Each tilted semiconductor heterostructure includes a core region, a set of shell regions adjoining a sidewall of the core region, and a pair of two-dimensional carrier accumulation (2DCA) layers. Each 2DCA layer is formed at a heterointerface between one of the sidewalls of the core region and one of the shell regions. The sidewalls of the core region, the shell regions, and the 2DCA layers each having a sloping surface, wherein each 2DCA layer forms an angle with a surface of the semiconductor structure.

公开(公告)号：US20180026157A1

公开(公告)日：2018-01-25

申请号：US15706990

申请日：2017-09-18

Applicant: Sensor Electronic Technology, Inc.

Inventor： Remigijus Gaska ,  Maxim S. Shatalov ,  Alexander Dobrinsky ,  Jinwei Yang ,  Michael Shur ,  Grigory Simin

IPC: H01L33/22 ,  H01L29/15 ,  H01L33/38 ,  H01L21/02 ,  H01L23/00 ,  H01L33/30

CPC classification number: H01L33/22 ,  H01L21/02496 ,  H01L24/05 ,  H01L24/14 ,  H01L29/151 ,  H01L33/30 ,  H01L33/32 ,  H01L33/38 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/1134 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2933/0016 ,  H01L2924/00

Abstract: A device including a first semiconductor layer and a contact to the first semiconductor layer is disclosed. An interface between the first semiconductor layer and the contact includes a first roughness profile having a characteristic height and a characteristic width. The characteristic height can correspond to an average vertical distance between crests and adjacent valleys in the first roughness profile. The characteristic width can correspond to an average lateral distance between the crests and adjacent valleys in the first roughness profile.