公开(公告)号：JP2014207485A

公开(公告)日：2014-10-30

申请号：JP2014158748

申请日：2014-08-04

Applicant: 株式会社東芝 ,  Toshiba Corp

Inventor： KATAGIRI MASAYUKI ,  SAKAI TADASHI ,  MIYAZAKI HISAO ,  YAMAZAKI YUICHI ,  SUZUKI MARIKO

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: 【課題】実施形態は、カーボンナノチューブを用いた低抵抗な配線に関するものである。【解決手段】実施形態にかかる半導体装置は、基板上の下層配線と、下層配線上にコンタクトホールが形成された層間絶縁膜と、コンタクトホールの底部に形成された触媒金属の粒子を有する触媒金属層と、触媒金属層上に形成されたコンタクトホールを貫通する多層カーボンナノチューブと、多層カーボンナノチューブ上に形成された上層配線と、を備え、多層カーボンナノチューブの層間には、原子又は分子が挿入されていることを特徴とする。【選択図】図1

Abstract translation: 要解决的问题：提供使用碳纳米管的低电阻布线。解决方案：根据实施例的半导体器件包括：在基板上的下层布线; 在下层布线上形成有接触孔的层间绝缘膜; 催化金属层，其形成在接触孔的底部并具有催化金属的颗粒; 形成在催化金属层上并穿透接触孔的多壁碳纳米管; 以及形成在多壁碳纳米管上的上层布线。 原子或分子插入多壁碳纳米管的层之间。

公开(公告)号：JP2014183211A

公开(公告)日：2014-09-29

申请号：JP2013057005

申请日：2013-03-19

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： KATAGIRI MASAYUKI ,  SAKAI TADASHI ,  MIYAZAKI HISAO ,  YAMAZAKI YUICHI ,  SUZUKI MARIKO

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/53276 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76877 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a low-resistance wiring using a carbon nanotube.SOLUTION: A semiconductor device according to an embodiment comprises: an underlayer wiring on a substrate; an interlayer insulating film in which a contact hole is formed on the underlayer wiring; a catalyst metal layer containing catalyst metal particles formed at a bottom part of the contact hole; a multi-layer carbon nanotube formed on the catalyst metal layer and penetrating the contact hole; and an upper-layer wiring formed on the multi-layer carbon nanotube. Atoms or molecules are inserted between layers of the multi-layer carbon nanotube.

Abstract translation: 要解决的问题：提供使用碳纳米管的低电阻布线。解决方案：根据实施例的半导体器件包括：衬底上的下层布线; 层间绝缘膜，其中在下层布线上形成接触孔; 催化剂金属层，其含有形成在所述接触孔的底部的催化剂金属颗粒; 形成在催化剂金属层上并穿透接触孔的多层碳纳米管; 以及形成在多层碳纳米管上的上层布线。 将原子或分子插入多层碳纳米管的层之间。

公开(公告)号：JP2013201373A

公开(公告)日：2013-10-03

申请号：JP2012070004

申请日：2012-03-26

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： YAMAZAKI YUICHI ,  WADA MAKOTO ,  SAITO TATSURO ,  SAKAI TADASHI

IPC: H01L21/3205 ,  C01B31/02 ,  H01B5/14 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L23/53276 ,  B82Y30/00 ,  H01L23/49866 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  Y10S977/734 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a conductive film having a large-area graphene.SOLUTION: A conductive film according to an embodiment comprises catalyst metal microparticles and a graphene which spreads in a reticular fashion by using the catalyst metal microparticles as nodes.

Abstract translation: 要解决的问题：提供具有大面积石墨烯的导电膜。溶液：根据实施方式的导电膜包括催化剂金属微粒和通过使用催化剂金属微粒作为节点以网状扩散的石墨烯。

公开(公告)号：JP2013172083A

公开(公告)日：2013-09-02

申请号：JP2012036377

申请日：2012-02-22

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： KITAMURA MASAYUKI ,  SAKATA ATSUKO ,  WADA MAKOTO ,  YAMAZAKI YUICHI ,  KATAGIRI MASAYUKI ,  KAJITA AKIHIRO ,  SAKAI TADASHI ,  SAKUMA HISASHI ,  MIZUSHIMA ICHIRO

IPC: H01L21/3205 ,  C23C16/26 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/02373 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76858 ,  H01L21/76861 ,  H01L21/76876 ,  H01L23/53276 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device including a high quality graphene having a lower resistivity than the conventional and fewer crystal defects as much as possible.SOLUTION: The manufacturing method of a semiconductor device comprises a step of forming a promoter layer having a face-centered cubic structure above the surface of a semiconductor substrate. The promoter layer is formed so that the (111) plane of the face-centered cubic structure is oriented in parallel with the surface of a semiconductor substrate. A catalyst layer having a face-centered cubic structure is formed on the promoter layer. The catalyst layer is formed so that the (111) plane of the face-centered cubic structure is oriented in parallel with the surface of a semiconductor substrate. A portion of the promoter layer in contact with the catalyst layer has a face-centered cubic structure. The catalyst layer is subjected to oxidation treatment and then subjected to reduction treatment thus planarizing the exposed surface of the catalyst layer. Finally, a graphene layer is formed on the catalyst layer.

Abstract translation: 要解决的问题：提供一种半导体器件的制造方法，该半导体器件包括尽可能多的具有比常规的更低的电阻率和更少的晶体缺陷的高质量石墨烯。解决方案：半导体器件的制造方法包括以下步骤： 启动子层，其在半导体衬底的表面上方具有面心立方结构。 形成促进剂层使得面心立方结构的（111）面与半导体衬底的表面平行取向。 在促进剂层上形成具有面心立方结构的催化剂层。 形成催化剂层，使得面心立方结构的（111）面与半导体衬底的表面平行取向。 与催化剂层接触的助催化剂层的一部分具有面心立方结构。 对催化剂层进行氧化处理，然后进行还原处理，从而使催化剂层的暴露表面平坦化。 最后，在催化剂层上形成石墨烯层。

公开(公告)号：JP2013115143A

公开(公告)日：2013-06-10

申请号：JP2011258098

申请日：2011-11-25

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： YAMAZAKI YUICHI ,  WADA MAKOTO ,  KITAMURA MASAYUKI ,  SAKAI TADASHI

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L23/53276 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y99/00 ,  H01L2924/0002 ,  H05K1/097 ,  Y10S977/734 ,  Y10S977/762 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide multi-layer graphene wiring and a semiconductor device having the multi-layer graphene wiring.SOLUTION: Wiring includes a substrate, a metal film provided on the substrate, a metal portion provided on the metal film, and graphene wiring formed on the metal portion. The graphene wiring is electrically in contact with the metal film, and the metal film and the metal portion are composed of different metal or alloys.

Abstract translation: 要解决的问题：提供多层石墨烯布线和具有多层石墨烯布线的半导体器件。 解决方案：布线包括基板，设置在基板上的金属膜，设置在金属膜上的金属部分和形成在金属部分上的石墨烯布线。 石墨烯布线与金属膜电接触，金属膜和金属部分由不同的金属或合金构成。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2012074632A

公开(公告)日：2012-04-12

申请号：JP2010219985

申请日：2010-09-29

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： EZAKI ZUISEN ,  YAMAZAKI YUICHI ,  SAKAI TADASHI

IPC: H01S5/026

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element capable of being driven by current and having a small size and a simple manufacturing process, and to provide a method of manufacturing the same.SOLUTION: A semiconductor light-emitting element comprises: a semiconductor substrate; a semiconductor light-emitting layer and a dielectric layer constituting a light-emitting element, formed above the semiconductor substrate; and a carbon nano-tube or a graphene layer formed above and on the semiconductor light-emitting layer and the dielectric layer.

Abstract translation: 要解决的问题：提供能够由电流驱动并具有小尺寸和简单的制造工艺的半导体发光元件，并提供其制造方法。 解决方案：半导体发光元件包括：半导体衬底; 形成在半导体衬底上的半导体发光层和构成发光元件的电介质层; 以及在半导体发光层和电介质层的上方形成的碳纳米管或石墨烯层。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2011204769A

公开(公告)日：2011-10-13

申请号：JP2010068430

申请日：2010-03-24

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： WADA MAKOTO ,  AKIMOTO YOSUKE ,  YAMAZAKI YUICHI ,  KATAGIRI MASAYUKI ,  MATSUNAGA NORIAKI ,  SAKAI TADASHI ,  SAKUMA HISASHI

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  B82Y10/00 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76876 ,  H01L21/76879 ,  H01L23/53238 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To achieve reduction in via resistance and facilitation of processes while using a carbon nanotube (CNT) as a contact material in a via hole.SOLUTION: A semiconductor device which uses CNTs for vias between wiring layers include an interlayer insulating film 19 provided on a substrate having Cu wirings 17 on a surface, via holes formed in the interlayer insulating film 19 and connected to the Cu wirings 17, first metal films 21 formed selectively on the Cu wirings 17 exposed in the via holes to serve as barriers for the Cu wiring 17s and also as promoters for growth of CNTs, second metal films 22 formed at least on the first metal films 21 in the via holes to serve as a catalyst for the growth of the CNTs, and the CNTs 23 formed in the via holes wherein the first and second metal films 21 and 22 are formed.

Abstract translation: 要解决的问题：在通孔中使用碳纳米管（CNT）作为接触材料的同时，实现通孔电阻的降低和工艺的简化。解决方案：使用CNT在布线层之间的通孔的半导体器件包括层间绝缘膜 19设置在具有表面上的Cu布线17的基板上，形成在层间绝缘膜19中并连接到Cu布线17的通孔，选择性地形成在露出在通孔中的铜布线17上的第一金属膜21，以用作屏障 对于Cu布线17s，并且作为CNT的生长促进剂，至少在通孔中的第一金属膜21上形成的第二金属膜22用作CNT的生长用催化剂，CNT 通孔，其中形成第一和第二金属膜21和22。

公开(公告)号：JP2009238690A

公开(公告)日：2009-10-15

申请号：JP2008086152

申请日：2008-03-28

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： SUZUKI MARIKO ,  SAKAI TADASHI ,  SAKUMA HISASHI ,  KATAGIRI MASAYUKI ,  YAMAZAKI YUICHI

IPC: H01J1/304 ,  H01J31/12

CPC classification number: H01J1/304 ,  H01J29/04 ,  H01J31/127 ,  H01J2329/0447

Abstract: PROBLEM TO BE SOLVED: To provide an electron emission element with a high electron emitting amount and large current density, and to provide an electron emission device. SOLUTION: The electron emission element comprises a conductive substrate, a first conductive-type first diamond layer formed on the conductive substrate, and a first conductive-type second diamond layer formed on the first diamond layer. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供具有高电子发射量和大电流密度的电子发射元件，并提供电子发射装置。 解决方案：电子发射元件包括导电衬底，形成在导电衬底上的第一导电型第一金刚石层和形成在第一金刚石层上的第一导电型第二金刚石层。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2007251002A

公开(公告)日：2007-09-27

申请号：JP2006074746

申请日：2006-03-17

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： ONO TOMIO ,  SAKAI TADASHI ,  SAKUMA HISASHI ,  YOSHIDA HIROAKI ,  SUZUKI MARIKO

IPC: H01L23/373

CPC classification number: H01L23/3732 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a heat sink and an electronic device which is high in thermal conductivity, and which is excellent in cooling efficiency and a method for manufacturing them.
SOLUTION: A heat sink 20 is provided with a base 21 part formed of an insulating diamond substrate having insulation and a first pressure welding body 221 and a second pressure welding body 222 formed of an insulating diamond substrate, and arranged on the base part 21. The electronic device 1 is provided with a heat sink 20 on the surface of the device main body 10, and the first pressure welding body 221 is pressure-welded to a heating part 12, and a second welding body 222 is pressure-welded to a non-heating part 13.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种导热性高，散热效率优异的散热器和电子器件及其制造方法。 散热器20设置有由具有绝缘体的绝缘金刚石基板形成的基部21部分和由绝缘金刚石基板形成的第一压力焊接体221和第二压力焊接体222，并且布置在基部 电子设备1在设备主体10的表面上设置有散热器20，并且将第一压力焊接体221压焊到加热部12，并且第二焊接体222是压力传感器， 焊接到非加热部件13.版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2007096130A

公开(公告)日：2007-04-12

申请号：JP2005285592

申请日：2005-09-29

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： SUZUKI MARIKO ,  ONO TOMIO ,  SAKAI TADASHI ,  SAKUMA HISASHI ,  YOSHIDA HIROAKI

IPC: H01L33/32 ,  H01L33/50

CPC classification number: H01L33/02 ,  H01L33/24 ,  H01L33/44 ,  H01L33/58

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element whose light emitting efficiency is high, and whose heating is reduced. SOLUTION: This semiconductor light emitting element is provided with a first semiconductor layer 3, a light emitting layer 4 arranged on the first semiconductor layer 3 whose refractive index is smaller than that of the first semiconductor layer 3, a second semiconductor layer 5 arranged on the light emitting layer 4 whose refractive index is smaller than that of the light emitting layer 4, and metallic electrodes 6a and 6b connected to the first semiconductor layer 3 and the second semiconductor layer 5 for supplying currents to the light emitting layer 4. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种发光效率高并且其加热降低的半导体发光元件。 解决方案：该半导体发光元件设置有第一半导体层3，布置在折射率小于第一半导体层3的第一半导体层3的第一半导体层3上的发光层4，第二半导体层5 布置在折射率小于发光层4的发光层4上，以及连接到第一半导体层3的金属电极6a和6b，以及用于向发光层4提供电流的第二半导体层5。 版权所有（C）2007，JPO＆INPIT