Abstract:
A dual magnetron sputtering power supply for use with a magnetron sputtering apparatus having at least first and second sputtering cathodes for operation in the dual magnetron sputtering mode, there being a means for supplying a flow of reactive gas to each of said first (1) and second (4) cathodes via first (12) and second (14) flow control valves each associated with a respective one of said first and second cathodes and each adapted to control a flow of reactive gas to the respectively associated cathode, the power supply having, for each of said first and second cathodes a means for deriving a feed-back signal relating to the voltage prevailing at that cathode, a control circuit for controlling the flow of reactive gas to the respectively associated cathode by controlling the respective flow control valve and adapted to adjust the respective flow control valve to obtain a voltage feedback signal from the respective cathode corresponding to a set point value set for that cathode. Also claimed is a magnetron sputtering apparatus in combination with such a power supply.
Abstract:
본 발명은 반응성 스퍼터링 방법에 관한 것으로, 이온 충격에 의해 물질이 제 1 타겟의 표면으로부터 토출되고 가스 페이즈로의 전이를 거치며, 여기서 음 전압이 펄스 방식으로 타겟으로 인가됨으로써, 0.5A/cm 2 보다 큰 전류 밀도를 갖는 전류가 타겟 표면에서 발생하도록 하고, 가스 페이즈로의 전이를 거치는 물질은 적어도 부분적으로 이온화되며, 반응성 가스 유량이 설정되어 반응성 가스가 타겟 표면의 물질과 반응하도록 한다. 전압 펄스 동안에 전류가 흐르는 지점(들)에서 대부분의 시간에, 타겟 표면은 반응성 가스와 타겟 물질로 이루어지는 화합물로 적어도 부분적으로 덮이며, 따라서 타겟 표면은 제 1 중간상태에 있고, 이 덮인 상태는 전압 펄스의 시작에서보다 전압 펄스의 말미에서 더 작으며, 따라서 타겟 표면은 전압 펄스의 말미에서 제 2 중간 상태에 있도록, 전압 펄스의 지속시간이 선택된다.
Abstract:
PROBLEM TO BE SOLVED: To provide a mask positioning mechanism capable of reducing generation of particles and positioning a mask at high accuracy, and a vacuum processing apparatus having the mask positioning mechanism. SOLUTION: The mask positioning mechanism includes a substrate holder 7 having four taper pins and vertically movable when conveying substrates, and a mask 31 having a groove 37 with each taper pin being insertable therein. Each taper pin consists of a pair of a long taper pin 35a and a short taper pin 35b arranged opposite to each other across the substrate, and tapered surface formed respectively on the long taper pin and the short taper pin are located at different levels. COPYRIGHT: (C)2011,JPO&INPIT