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    A voltage controlled oscillator
    41.
    发明公开
    A voltage controlled oscillator 失效
    一个压控振荡器

    公开(公告)号：EP0583800A1

    公开(公告)日：1994-02-23

    申请号：EP93117167.2

    申请日：1990-08-24

    Applicant: ANRITSU CORPORATION

    Inventor： Saeki, Hiroshi, Anritsu Okihara-Ryou ,  Motoyama, Hatsuo

    IPC: H03L7/099 ,  H03B5/12 ,  H03B21/01

    CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

    Abstract: A voltage controlled oscillator is provided comprising resonant circuit means (301) and an active circuit means (303) having an active element T1, the input of the active circuit means being connected to the resonant circuit means (301). Variable capacitance ratio means (304) are connected to the active circuit means (303) in order to oscillate the active element T1 at a resonance frequency of the resonance circuit means (301). Variable control means are provided for changing the resonance frequency, so that the oscillator frequency of the active element T1 can be changed substantially linearly over a wide bandwidth, to thereby retain the amount of positive feed back at a predetermined level against the oscillator frequency of the active circuit means (303).

    Abstract translation: 提供一种压控振荡器，其包括谐振电路装置（301）和具有有源元件T1的有源电路装置（303），有源电路装置的输入连接到谐振电路装置（301）。 可变电容比装置（304）连接到有源电路装置（303），以便以谐振电路装置（301）的谐振频率振荡有源元件T1。 可变控制装置被设置用于改变谐振频率，使得有源元件T1的振荡器频率可以在宽带宽上基本线性地改变，从而将正反馈量保持在预定水平， 有源电路装置（303）。

    Frequency synthesizer for implementing generator of highly pure signals and circuit devices, such as VCO, PLL and SG, used therein
    45.
    发明公开
    Frequency synthesizer for implementing generator of highly pure signals and circuit devices, such as VCO, PLL and SG, used therein 失效
    一种频率合成器，用于产生高纯度的信号以及相关联的电路元件，例如VCO，PLL和信号发生器的发电机。

    公开(公告)号：EP0414260A2

    公开(公告)日：1991-02-27

    申请号：EP90116261.0

    申请日：1990-08-24

    Applicant: ANRITSU CORPORATION

    Inventor： Saeki Anritsu Okihara-Ryou, Hiroshi ,  Motoyama, Hatsuo

    IPC: H03B21/01 ,  H03L7/087 ,  H03L7/099 ,  H03B19/16

    CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

    Abstract: To output desired high purity signals, a frequency synthesizer was made to synthesize reference signals from a first and second signal generators (11, 12) in the same frequency band as a desired frequency band. Thereby, the resolution of the frequency synthesizer becomes twice the step ΔF. Also, the frequency synthe­sizer can interpolate the step size of the first signal generator with half the number of steps. While, heretofore, the 100-MHz step size was interpolated with Fq = 0, 10, 20, 30, 40 and 50 MHz, Fq = 0, 20, 40 MHz interpolation is made possible. This permits the syn­thesis of 580 MHz to 1280 MHz. In this case, however, the minimum difference between the sum and difference frequencies from the first and second signal generators (11, 12) is 40 MHz and the lowest frequency is 20 MHz. Thus, depending on mixer isolation, the spurious meas­ures become difficult. The frequency synthesizer of the present invention pays attention to the fact that 20 MHz step signals can be synthesized at frequencies which are integral multiples of Fq (multiples of 0 and 5 are excluded). When two-fold Fq is used, the minimum dif­ference between the sum and difference frequencies out­put from a mixer (13) is 80 MHz and the lowest used frequency is 40 MHz. The spurious measures by a PLL circuit (14) becomes easy. A frequency detector (18) forces the free-running frequency of a VCO included the PLL circuit. Control Data P and Q to the first and sec­ond signal generators are supplied from a control sec­tion (27) based on data Fi set by as frequency setting section (28).

    Abstract translation: 为了输出所需的高纯度的信号，这使得从在相同的频带作为一种期望的频率带的第一和第二信号发生器（11，12）合成的参考信号的频率合成器。 由此，频率合成器的分辨率变为两倍的步骤DELTA F.因此，频率合成器可以与步骤一半数量的内插所述第一信号发生器的步长大小。 而，迄今为止，在100-MHz的步长大小，其与Fq中= 0，10，20，30，40和50兆赫，F Q = 0，20，40 MHz的内插是可能的内插。 这允许580兆赫的合成，1280兆赫。 在这种情况下，然而，和与差之间的最小差值从所述第一和第二信号发生器频率（11，12）为40MHz，而最低频率为20MHz。 因此，根据混频器的隔离，寄生措施变得困难。 本发明的频率合成器注重可以在哪些是Fq上的整数倍的频率进行合成的factthat 20MHz的步骤信号（0和5的倍数除外）。 当使用两倍FQ，和与差之间的最小差值频率从混频器输出（13）是80MHz，最低使用频率为40兆赫。 由PLL电路（14）的寄生措施变得容易。 频率检测器（18）强制VCO的自由运行频率包括在PLL电路。 控制数据P和Q，以将第一和第二信号发生器，从一个控制部分（27），基于由设定为频率设定部（28）的数据网络连接提供。

    Oscillator and information equipment using the same, and voltage controlled oscillator and information equipment using the same
    47.
    发明专利
    Oscillator and information equipment using the same, and voltage controlled oscillator and information equipment using the same 有权
    使用其的振荡器和信息设备，以及使用其的电压控制振荡器和信息设备

    公开(公告)号：JP2007267353A

    公开(公告)日：2007-10-11

    申请号：JP2006275445

    申请日：2006-10-06

    Applicant: Renesas Technology Corp ,  株式会社ルネサステクノロジ

    Inventor： NAKAMURA TAKAHIRO ,  MASUDA TORU ,  KITAMURA TOMOMITSU ,  HAYASHI NORIO ,  MORI HIROSHI

    IPC: H03B5/08 ,  H03B5/12 ,  H03H5/12

    CPC classification number: H03J3/20 ,  H03B5/1215 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1293 ,  H03B5/1296 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03D3/007 ,  H03J2200/10

    Abstract: PROBLEM TO BE SOLVED: To provide an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain, and an oscillator and information equipment using the same. SOLUTION: The LC resonant circuit of the oscillator includes a parallel circuit of an inductor L1, a first fine adjustable capacitor and a first capacitor bank, and a series capacitor of a second fine adjustable capacitor and a second capacitor bank. A frequency conversion gain of the oscillator is the sum of a frequency conversion gain of the oscillator based upon the first fine adjustable capacitor which decreases according to increase of a capacitance value of the first capacitor bank, and a frequency conversion gain based upon the second fine adjustable capacitor which increases according to increase of a capacitance value of the second capacitor bank. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种具有降低的变频增益波动的振荡器的LC谐振电路，以及使用该谐振电路的振荡器和信息设备。 解决方案：振荡器的LC谐振电路包括电感器L1，第一微调电容器和第一电容器组的并联电路，以及第二精细可调电容器和第二电容器组的串联电容器。 振荡器的变频增益是基于根据第一电容器组的电容值的增加而减小的第一微细可调电容器的振荡器的变频增益之和和基于第二微调的频率转换增益 可调电容器根据第二电容器组的电容值的增加而增加。 版权所有（C）2008，JPO＆INPIT

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