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公开(公告)号:EP1583232A2
公开(公告)日:2005-10-05
申请号:EP05090077.8
申请日:2005-03-29
Applicant: NEC CORPORATION
Inventor: Ishihara, Takeshi, c/o NEC Corporation
IPC: H03G3/30
CPC classification number: H04W52/22 , H03G3/3068 , H03G2201/103 , H03G2201/202 , H03G2201/305 , H03G2201/307 , H03G2201/702 , H03M1/122 , H03M1/18 , H03M1/183
Abstract: An automatic gain control device includes an amplifier for a reception signal, a signal processing unit, a memory, and a control unit. The amplifier can set a gain. The signal processing unit extracts control data from an output from the amplifier and performs information processing for the data. The memory stores the gain setting value of the amplifier. The control unit controls the gain of the amplifier in accordance with a preset control algorithm. On the basis of the result obtained when the control unit computes a gain setting value stored in the memory in accordance with a preset algorithm, the control unit controls the gain of the amplifier in correspondence with operation of switching the frequency of a reception signal, which is accompanied by different frequency monitoring in the compressed mode by the signal processing unit. A radio communication terminal, a control method for an automatic gain control device, a control program for an automatic gain control device, an automatic gain control method, a radio communication system, and a radio communication method are also disclosed.
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公开(公告)号:JP4574687B2
公开(公告)日:2010-11-04
申请号:JP2008019026
申请日:2008-01-30
Applicant: Okiセミコンダクタ株式会社
Inventor: 博次 赤堀
CPC classification number: H03G3/3068 , H03G2201/204 , H03G2201/206 , H03G2201/305 , H03G2201/307
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公开(公告)号:JP4152983B2
公开(公告)日:2008-09-17
申请号:JP2005504575
申请日:2003-07-25
Applicant: 富士通株式会社
IPC: H04B17/40 , H04J3/00 , H03G3/00 , H03G3/20 , H03G3/30 , H04B1/16 , H04B1/707 , H04B7/005 , H04J11/00 , H04J13/00
CPC classification number: H03G3/3052 , H03G3/005 , H03G3/3078 , H03G3/3089 , H03G2201/103 , H03G2201/202 , H03G2201/305 , H04B1/707 , H04B2201/70701 , H04B2201/70706
Abstract: A received frame is branched into a gain control system (20A) for common pilot signals and a gain control system (20B) for individual data signals. The gain control system (20A) controls the gain of the common pilot signals, and the gain control system (20B) controls the gain of the data signals. A signal processor (30) establishes synchronization of frames, outputs a gain control signal (g1) so that the gain of the common pilot signal is constant, to a gain control circuit (21a) for the common pilot signals, and outputs a gain control signal (g2) so that the gain of the data signal is constant, to a gain control circuit (21b) for the data signals. The gain is controlled to be constant, thereby preventing saturation of ADC (26a, 26b, 27a, 27b) and S/N deterioration.
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公开(公告)号:JPWO2005011165A1
公开(公告)日:2006-09-14
申请号:JP2005504575
申请日:2003-07-25
Applicant: 富士通株式会社
IPC: H04B17/40 , H04J11/00 , H03G3/00 , H03G3/20 , H03G3/30 , H04B1/16 , H04B1/707 , H04B7/005 , H04J3/00 , H04J13/00
CPC classification number: H03G3/3052 , H03G3/005 , H03G3/3078 , H03G3/3089 , H03G2201/103 , H03G2201/202 , H03G2201/305 , H04B1/707 , H04B2201/70701 , H04B2201/70706
Abstract: 受信したフレームは、共通パイロット信号の利得制御系統(20A)と、個別のデータ信号の利得制御系統(20B)に2分岐される。利得制御系統(20A)は、共通パイロット信号の利得を利得制御し、利得制御系統(20B)は、データ信号の利得を利得制御する。信号処理部(30)は、フレームの同期をとり、共通パイロット信号の利得が一定となる利得制御信号(g1)を共通パイロット信号の利得制御回路(21a)に出力し、また、データ信号の利得が一定となる利得制御信号(g2)をデータ信号の利得制御回路(21b)に出力する。利得が一定に制御されることにより、ADC(26a,26b,27a,27b)の飽和やS/N劣化を防ぐ。
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公开(公告)号:JP2009182589A
公开(公告)日:2009-08-13
申请号:JP2008019026
申请日:2008-01-30
Applicant: Oki Semiconductor Co Ltd , Okiセミコンダクタ株式会社
Inventor: AKAHORI HIROTSUGU
CPC classification number: H03G3/3068 , H03G2201/204 , H03G2201/206 , H03G2201/305 , H03G2201/307
Abstract: PROBLEM TO BE SOLVED: To provide an RF receiver capable of controlling the signal component of a desired channel at a proper level without saturating a high-frequency amplifying stage. SOLUTION: The RF receiver has an RF amplifying means amplifying a received high-frequency signal, a mixing means converting the output high-frequency signal of the RF amplifying means into an intermediate-frequency signal and an IF amplifying means amplifying the output intermediate-frequency signal of the mixing means. The RF receiver further has a first level detecting means detecting the signal level of the output high-frequency signal of the RF amplifying means, a second level detecting means detecting the signal level of the output intermediate-frequency signal of the mixing means and a third level detecting means detecting the signal level of the intermediate-frequency signal amplified by the IF amplifying means. The RF receiver further has an RF reference-level generating means generating an RF reference level on the basis of at least one of the detecting-signal levels of the first and second level detecting means and an RF-gain control means controlling the amplifying gain of the RF amplifying means so that a value corresponding to the detecting-signal level of the third level detecting means is equalized to the RF reference level. COPYRIGHT: (C)2009,JPO&INPIT
Abstract translation: 要解决的问题:提供一种RF接收器,其能够在不使饱和高频放大级的情况下以适当的电平来控制期望信道的信号分量。 解决方案:RF接收机具有放大接收到的高频信号的RF放大装置,将RF放大装置的输出高频信号转换为中频信号的混合装置和放大输出的IF放大装置 混合装置的中频信号。 RF接收机还具有检测RF放大装置的输出高频信号的信号电平的第一电平检测装置,检测混频装置的输出中频信号的信号电平的第二电平检测装置和第三电平检测装置 检测由IF放大装置放大的中频信号的信号电平的电平检测装置。 RF接收机还具有基于第一和第二电平检测装置的检测信号电平中的至少一个产生RF参考电平的RF参考电平发生装置和控制第一和第二电平检测装置的放大增益的RF增益控制装置 RF放大装置使得与第三电平检测装置的检测信号电平对应的值与RF参考电平相等。 版权所有(C)2009,JPO&INPIT
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公开(公告)号:JP4061503B2
公开(公告)日:2008-03-19
申请号:JP2004111692
申请日:2004-04-06
Applicant: ソニー株式会社
Inventor: 大和 岡信
IPC: H03G3/20 , H03G1/00 , H03G3/30 , H03G7/00 , H04B1/06 , H04B1/10 , H04B1/16 , H04B7/00 , H04B17/40
CPC classification number: H03G3/3068 , H03G1/0023 , H03G1/0088 , H03G7/001 , H03G2201/103 , H03G2201/204 , H03G2201/305 , H03G2201/307 , H03G2201/506
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公开(公告)号:JP2005295471A
公开(公告)日:2005-10-20
申请号:JP2004111692
申请日:2004-04-06
Inventor: OKASHIN YAMATO
IPC: H03G3/20 , H03G1/00 , H03G3/30 , H03G7/00 , H04B1/06 , H04B1/10 , H04B1/16 , H04B7/00 , H04B17/40
CPC classification number: H03G3/3068 , H03G1/0023 , H03G1/0088 , H03G7/001 , H03G2201/103 , H03G2201/204 , H03G2201/305 , H03G2201/307 , H03G2201/506
Abstract: PROBLEM TO BE SOLVED: To realize appropriate AGC for a desired wave signal and an interference wave signal. SOLUTION: There are provided attenuator circuits 42-44 cascade-connected to a received signal SRX and differential amplifiers 51-54 to which the received signal SRX and output signals of the attenuator circuits 42-44 are supplied, respectively. There are also provided resistors R55, R56 connected in common to output terminals of the differential amplifiers 51-54 so as to extract level-controlled output signals and a control current generating circuit 34 for generating control currents I51-I54 of predetermined characteristics from first and second AGC voltages VAGC, VOL. The control currents I51-I54 outputted from the control current generating circuit 34 are supplied to the differential amplifiers 51-54 as their operation switching and gain control signals. A control current Im equal to the control currents I51-I54 is negatively fed back by the control current generating circuit 34. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract translation: 要解决的问题:为所需波信号和干扰波信号实现适当的AGC。 提供了分别与接收信号SRX和差分放大器51-54级联的衰减器电路42-44,差分放大器51-54分别向其提供接收信号SRX和衰减器电路42-44的输出信号。 还提供了电阻R55,R56共同连接到差分放大器51-54的输出端,以便提取电平控制的输出信号;以及控制电流产生电路34,用于产生从第一和第一预定特性的控制电流I51-154; 第二AGC电压VAGC,VOL。 从控制电流产生电路34输出的控制电流I51-I54作为其操作切换和增益控制信号被提供给差分放大器51-54。 与控制电流I51〜I54相等的控制电流Im1由控制电流产生电路34负反馈。(C)2006,JPO&NCIPI
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公开(公告)号:KR101150602B1
公开(公告)日:2012-06-01
申请号:KR1020077017434
申请日:2005-12-28
Applicant: 조란 코포레이션
Inventor: 헨니그,앤드리스
CPC classification number: H03G3/3068 , H03G2201/103 , H03G2201/204 , H03G2201/305 , H03G2201/307 , H03G2201/706
Abstract: 신호처리를위한수신기는제1 증폭회로와제2 증폭회로를포함한다. 제1 증폭회로는제1 이득프로파일과관련되어동작한다. 제2 증폭회로는제2 이득프로파일과관련되어동작한다. 수신기는또한변조된신호와관련된품질표시자를결정하는이득제어회로를포함한다. 이득제어회로는결정된품질표시자에적어도부분적으로기초하여제1 이득프로파일및 제2 이득프로파일을조정한다.
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公开(公告)号:KR1020060045501A
公开(公告)日:2006-05-17
申请号:KR1020050028193
申请日:2005-04-04
Applicant: 소니 주식회사
Inventor: 오카노부다이와
CPC classification number: H03G3/3068 , H03G1/0023 , H03G1/0088 , H03G7/001 , H03G2201/103 , H03G2201/204 , H03G2201/305 , H03G2201/307 , H03G2201/506
Abstract: 본 발명의 AGC 회로는 수신 신호에 대해서 직렬 접속된 복수의 감쇠회로와, 상기 수신 신호 및 상기 복수의 감쇠회로의 각 출력 신호가 각각 공급되는 복수의 가변 이득 증폭기와, 복수의 가변 이득 증폭기의 출력단에 공통으로 접속되어 레벨 제어된 출력 신호를 출력하는 신호 출력 회로와, 제 1 및 제 2AGC 전압으로부터 소정의 특성의 제어 전류를 생성하는 제어 전류 생성 회로를 가지고, 제어 전류 생성 회로로부터 출력되는 상기 제어 전류는 상기 가변 이득 증폭기에 그 동작의 전환 및 이득의 제어 신호로서 공급되고, 상기 제어 전류에 대응하는 제어 전류가 제어 전류 생성 회로에 부귀환된다.
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公开(公告)号:KR2020090006415U
公开(公告)日:2009-06-29
申请号:KR2020070020615
申请日:2007-12-24
Applicant: 엘지이노텍 주식회사
Inventor: 노영숙
IPC: H03G3/20
CPC classification number: H03G3/3068 , H03G2201/305
Abstract: 본 고안은 튜너의 중간주파수 자동이득제어 증폭기에 관한 것이다.
본 고안은 입력되는 신호의 세기에 따라 중간주파수의 신호 크기를 조절하는 중간주파수 자동이득제어 증폭기를 제 1 트랜지스터와 제 2 트랜지스터 및 개별 수동소자들로 구성함으로써, 상기 소자의 가변 조절이 용이하여 상기 중간주파수 자동이득제어 증폭기의 성능 향상은 물론 제작 단가를 낮출 수 있는 효과를 제공하게 되는 것이다.
튜너, 중간주파수, 자동이득제어증폭기
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