ADAPTIVE DECISION LEVEL CIRCUIT
    41.
    发明申请
    ADAPTIVE DECISION LEVEL CIRCUIT 审中-公开
    自适应决策电路

    公开(公告)号:WO1981002653A1

    公开(公告)日:1981-09-17

    申请号:PCT/US1981000177

    申请日:1981-02-11

    CPC classification number: H04L25/065 H03K5/086 H04L25/063

    Abstract: The adaptive decision level circuit (FIG. 3) slices a digital signal with respect to a decision level disposed between the signal levels. A correction signal generated from the sliced signals (S, S) compensates for variations in the signal levels by maintaining the decision level at a constant position relative to the signal levels. The correction signal is generated by comparing (321) the integrated difference (on lead 305) between the sliced signal and its complement with the statistically expected value (312) of the difference between the sliced signal and its complement. In the preferred embodiment, the expected value is equal to one-half the signal swing of the sliced signal.

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