公开(公告)号：DE69528443T2

公开(公告)日：2003-11-27

申请号：DE69528443

申请日：1995-12-19

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： BINFORD CHARLES D ,  GAERTNER MARK A ,  DENNY STEVEN P

IPC: G06F11/16 ,  G06F3/06 ,  G06F11/10 ,  G06F11/14 ,  G11B20/18

Abstract: The present invention provides for a method for assuring consistency between data and parity in a independent access disk array system following a system reset or a power failure condition which interrupts the execution of one or more disk write I/O operations. The method includes the steps of: examining current drive activities to identify unfinished write I/O operations in response to the receipt of a reset signal from a host system or a low power warning signal from a uninterruptable power supply (UPS); logging information necessary to identify the unfinished write I/O operations and the array redundancy groups associated with the unfinished write I/O operations into a non-volatile memory; and checking for log entries in the non-volatile memory during a disk array subsystem initialization following the system reset, or the restoration of power following a power failure. For each one of the unfinished write I/O operations identified in the log, the method further includes the steps of: performing a bit-wise exclusive-OR of corresponding portions of the data stored within the redundancy group associated with the unfinished write I/O operations to calculate parity consistent therewith; and writing the calculated parity to the parity storage areas within the redundancy group associated the unfinished write I/O operation. For an array operating in a degraded mode, i.e., operating with a failed disk drive member, the method also logs information necessary to identify the data and parity data storage areas to which the unfinished write I/O operations map new data and parity, and some form of the old data and parity information saved to the data and parity data storage areas to which the unfinished write I/O operations map new data and parity. Following the system reset, or restoration of power, consistent parity is determined for each redundancy group associated with an unfinished write I/O operation by combining the old data and parity saved to the non-volatile memory with the data currently stored within the data storage area to which the unfinished write I/O operation maps new data.

公开(公告)号：CA2224606C

公开(公告)日：2003-02-25

申请号：CA2224606

申请日：1997-12-11

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： WILLS JEFFREY MERLIN

IPC: H04Q3/00 ,  H04L12/56

Abstract: The present invention provides for an ATM switch for transferring ATM cells from input channels to output channels. The switch has a plurality of input and output ports, each connected to input and output channels respectively. The ATM switch also has a switch block connected between each one of the input ports and each one of the output ports to convey the cells from the input ports to the output ports, and a backpressure signal circuit. Each input port has an input buffer which holds cells which arrive faster from an input channel than the input port can transmit to the switch block, and each output port has an output buffer holding cells when the cells arrive faster from the switch block than the output port can transmit. The backpressure signal circuit sends a signal from a congested output buffer to those input port buffers which have transmitted a cell to the output buffer (during congestion) so that the input port buffers cease transmission. The cells destined for the output buffer are then stored in the input port buffers.

公开(公告)号：SG91872A1

公开(公告)日：2002-10-15

申请号：SG200003069

申请日：1997-05-30

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： HSINGYA ARTHUR WANG ,  JEIN-CHEN YOUNG ,  MING-SANG KWAN ,  IIHYUN CHOI

IPC: H01L21/8238 ,  H01L21/8247 ,  H01L27/092 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C16/06 ,  G11C7/00 ,  G11C16/00 ,  G11C16/02

公开(公告)号：DE69622126D1

公开(公告)日：2002-08-08

申请号：DE69622126

申请日：1996-10-30

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： PINKHAM RAY

IPC: G11C11/401 ,  G11C29/00 ,  G11C29/04 ,  G06F11/20

Abstract: A redundancy circuit for a multiport memory device with preferably first and second memories includes a fuse programming circuit, shared between the first and second memories, for programming a first redundant address. A first address compare circuit compares a received address for the first memory with the first redundant address. The first address compare circuit generates a redundant address selection signal when the received address is the same as the first redundant address. A second address compare circuit compares a second received address for the second memory with the first redundant address. The second address compare circuit generates a redundant address selection signal when the received address is the same as the first redundant address.

公开(公告)号：DE69522423T2

公开(公告)日：2002-04-11

申请号：DE69522423

申请日：1995-12-13

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： SKOOG STEVEN K

IPC: G06F3/033 ,  G06F3/041 ,  G06F3/045 ,  G06K9/00 ,  G06K11/18

Abstract: The present invention provides for a stylus (6) for use with a digitizing tablet (3). The stylus is arranged to store information which identifies characteristics of a user's handwriting and these characteristics are transmitted to a computer (2) when the user interfaces with the computer (2), and can then be used by the computer to recognize the user's handwriting.

公开(公告)号：DE69428086T2

公开(公告)日：2002-03-28

申请号：DE69428086

申请日：1994-09-15

Applicant: NCR INT INC ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS INC

Inventor： YAKURA JAMES P ,  COLE RICHARD K ,  VON THUN MATTHEW S ,  HASS CRYSTAL J ,  ALLMAN DERRYL D J

IPC: H01L21/66 ,  G01K1/02 ,  G01K7/00 ,  H01L21/00

Abstract: An apparatus for sensing data such as temperature with respect to objects such as silicon wafers undergoing fabrication or other processes involve the use of a monitor element of material and configuration similar to that of the objects being processed. A structure such as a closed loop or segment of a spiral may be formed on the surface of the monitor element, and acts as a secondary coil when brought into operative relation with a transformer structure which includes a primary coil, a current source and a sensing device. The sensing device senses variations in the electrical characteristics in the primary coil, caused by the presence of the monitor element, and can thereby determine the temperature or other desired data relating to the monitor element, which is substantially the same as comparable data for the objects being processed.

公开(公告)号：DE69525204D1

公开(公告)日：2002-03-14

申请号：DE69525204

申请日：1995-09-13

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： GASPARIK FRANK

IPC: H03K19/20 ,  H03K19/00 ,  H03K19/0175 ,  H03K19/094 ,  H03K19/0948 ,  H03K19/0185

Abstract: The circuit for reducing power consumption includes an inverter comprising a p-channel and n-channel transistor. A buffer has its input coupled to the inverter input. A second p-channel transistor has its gate coupled to the buffer output, its source coupled to a supply voltage, and its drain coupled to the inverter p-channel drain. A second n-channel transistor may be provided, having its gate coupled to the buffer output, its source coupled to a second supply voltage, and its drain coupled to inverter n-channel source.

公开(公告)号：DE69523024T2

公开(公告)日：2002-03-14

申请号：DE69523024

申请日：1995-12-13

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： TRUNCK BRUCE R ,  SKOOG STEVEN K

IPC: G06F3/041 ,  G06F3/033 ,  G06F3/038 ,  G06F3/048 ,  G06K11/18

Abstract: The invention provides for a stylus (6) for use with a digitizing tablet (9), such as that associated with the display of a portable computer (3). The stylus (6) contains memory means which stores data such as its operating state (i.e., states of user-controlled buttons, state of charge of battery), a stylus identification code, and fault codes which indicate error conditions which may arise and in which the stylus (6) transmits the contents of the memory means, by a serial bit stream, to the computer (3).

公开(公告)号：DE69523410D1

公开(公告)日：2001-11-29

申请号：DE69523410

申请日：1995-11-10

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： CHEN DAO-LONG ,  ELLSWORTH DANIEL L

IPC: H01R25/00 ,  H01R13/66 ,  H01R13/703 ,  H01R29/00 ,  H02M3/00 ,  H02M3/135 ,  H02M3/28 ,  H02M7/04 ,  H02M7/12 ,  H02M3/335 ,  H01R24/04

Abstract: The invention provides for an AC-DC voltage conversion integrated circuit arrangement that integrates all control and protection circuits (52), as well as power transistors, into a single module (50). Passive components, such as the transformer (11) and capacitors (61-66), can comprise relatively very small components, as the switching frequency is in the KHz or MHz range and the arrangement includes one or more integrated switched mode power supply ICs (52) and can be provided in a wall outlet which allows for the provision of one of a plurality of DC voltages therefrom.

公开(公告)号：DE69520620T2

公开(公告)日：2001-10-11

申请号：DE69520620

申请日：1995-06-27

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： PROEBSTING ROBERT J

IPC: H03K19/003 ,  G11C7/10 ,  G11C11/34 ,  H03K17/04 ,  H03K17/687 ,  H03K19/017

Abstract: A fast propagation technique for use in CMOS circuits, whereby faster signal transition at an information carrying edge of a propagating signal is achieved at a cost of slower signal transition at the opposite edge. The technique of the present invention skews a size ratio of P-channel pull-up to N-channel pull-down transistors in the CMOS circuit to obtain much faster transition at one (rising or falling) edge of the signal and slower transition at the opposite edge. The fast propagation technique of the present invention is well suited for synchronous digital CMOS circuits such as synchronous RAMs.