公开(公告)号：KR1020000001016A

公开(公告)日：2000-01-15

申请号：KR1019980021036

申请日：1998-06-08

Applicant: 삼성전자주식회사

Inventor： 손교민 ,  서영호

IPC: H01L27/07

CPC classification number: G05F1/465

Abstract: PURPOSE: A voltage converting circuit is provided to prevent the transistors of a boosting circuit or a clock generating circuit from being broken by applying a stable voltage downed below an external power supply voltage as a power supply voltage of the voltage converting circuit, not by applying the external power supply voltage as the power supply voltage thereof. CONSTITUTION: The internal power supply voltage converting circuit comprises: an internal power supply voltage generating part(18) for comparing a voltage difference between a reference voltage and a first internal power supply voltage by use of an external power supply voltage(VEXT) as a power supply, wherein the internal power supply voltage generating part maintains the reference voltage; a clock signal generating part(10) for receiving the first internal power supply voltage as a power supply to generate a clock signal(CLK); a boosting part(12) for receiving the external power supply voltage as a power supply to boost the external power supply voltage in response to the clock signal; a differential comparator(14) for receiving the boosted voltage(Vp) as a power supply to compare a voltage difference between the reference voltage and a second internal power supply voltage, wherein the differential comparator(14) increases its output voltage when the second internal power supply voltage is lower than the reference voltage and decreases the output voltage when the second internal power supply voltage is higher than the reference voltage; and a driver for converting the external power supply voltage in response to the output voltage from the differential amplifier to generate the converted voltage as the second internal power supply voltage.

Abstract translation: 目的：提供一种电压转换电路，通过将低于外部电源电压的稳定电压作为电压转换电路的电源电压来防止升压电路或时钟发生电路的晶体管损坏，而不是通过施加 外部电源电压作为其电源电压。 内部电源电压转换电路包括：内部电源电压产生部（18），用于通过使用外部电源电压（VEXT）作为参考电压与第一内部电源电压之间的电压差进行比较 电源，其中所述内部电源电压产生部件保持所述参考电压; 用于接收第一内部电源电压作为电源以产生时钟信号（CLK）的时钟信号产生部分（10）; 用于接收外部电源电压作为电源的升压部分（12），以响应于时钟信号升高外部电源电压; 差分比较器（14），用于接收作为电源的升压电压（Vp）以比较参考电压和第二内部电源电压之间的电压差，其中当第二内部电压 当第二内部电源电压高于参考电压时，电源电压低于参考电压并降低输出电压; 以及用于响应于来自差分放大器的输出电压而转换外部电源电压以产生转换的电压作为第二内部电源电压的驱动器。

公开(公告)号：KR1019990048176A

公开(公告)日：1999-07-05

申请号：KR1019970066793

申请日：1997-12-08

Applicant: 삼성전자주식회사

Inventor： 손교민 ,  김수철 ,  정민철

IPC: G11C11/413

Abstract: 외부 클럭 신호의 사이클 동안에 적어도 2 개의 데이터를 출력하기 위한 본 발명의 동기형 메모리 장치는 메모리 셀들의 어레이와; 상기 외부 클럭 신호의 한 사이클 동안에 어드레싱된 메모리 셀들로부터 적어도 2 개의 데이터를 감지하고 증폭하기 위한 감지 증폭 회로 및; 상기 감지 증폭된 데이터를 받아들이기 위한 데이터 출력 버퍼를 포함한다.