Abstract:
A display may be provided with integral touch functionality. The display may include a common electrode layer having row electrodes arranged in rows and column electrodes interposed between the row electrodes of each row. The row electrodes may be electrically coupled by conductive paths. The row and column electrodes may be coupled to touch sensor circuitry that uses the row and column electrodes to detect touch events. Each electrode of the common electrode layer may cover a respective portion of an array of pixels. Each pixel of the display may have a respective aperture. The conductive paths that electrically couple row electrodes of the common electrode layer may cover or otherwise block some light from passing through pixels, resulting in reduced apertures. Dummy structures may be provided for other pixels that modify the apertures of the other pixels to match the reduced apertures associated with the conductive paths.
Abstract:
A touch screen having touch circuitry integrated into a display pixel stackup. The touch screen can include a transistor layer, an LED layer and a first layer. The first layer can operate as an LED cathode during a display phase and as touch circuitry during a touch sensing phase. The transistor layer can be at least partially utilized for transitioning between the display phase and the touch sensing phase. The touch screen can be fabricated to reduce or eliminate damage to the LED layer.
Abstract:
A transistor that may be used in electronic displays to selectively activate one or more pixels. The transistor includes a metal layer, a silicon layer deposited on at least a portion of the metal layer, the silicon layer includes an extension portion that extends a distance past the metal layer, and at least three lightly doped regions positioned in the silicon layer. The at least three lightly doped regions have a lower concentration of doping atoms than other portions of the silicon layer forming the transistor.
Abstract:
A TFT stack for a liquid crystal display is provided. The TFT stack includes a silicon layer that includes a heavily doped region, a non-doped region, and a lightly doped region between the heavily doped region and the non-doped region. The heavily doped region is hydrogenated. The TFT stack also includes an insulation layer that includes a first portion formed over the lightly doped region and a second portion disposed over the non-doped region and a gate metal electrode layer formed over the second portion of the non-doped region. The TFT stack also includes a first dielectric layer disposed over the gate metal electrode and over the first portion of the insulation layer. The heavily doped region is hydrogenated to reduce the dependence of the capacitance between the gate metal electrode and the conductive layer Cgd upon a bias voltage being applied between the gate metal electrode and the conductive layer.
Abstract:
A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
Abstract:
A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.
Abstract:
An electronic device may include a display and a sensor under the display. The display may include pixels having emission transistors that are controlled by emission signals. The emission signals are controlled using a pulse width modulation (PWM) scheme to control the brightness of the display. The emission signals may further include a localized sensor blackout pulse configured to generate a localized sensor blackout region that overlaps with the sensor to reduce any undesired back emission of light emitted from the display. The sensor blackout pulse may be automatically generated periodically or generated in an on-demand basis once per frame, multiple times per frame time, or once every multiple frames. Any luminance degradation caused by the sensor blackout pulse may be compensated by boosting the luminance and/or by extending the duration of each emission on pulse.
Abstract:
A display may include an array of pixels, where each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The thin-film transistors may be controlled using at least first and second horizontal scan line signals. Loading different data values into any given row in the array may cause the scan line signals to exhibit varying rise/fall times, which results in horizontal crosstalk and luminance non-uniformity across the display. The rise and fall times of the second scan line signal are crucial, so the second scan line signal is driven by two separate scan line drivers formed on both sides of the display. Only the fall time of the first scan line signal is crucial, so the first scan line signal is driven by only one peripheral scan line driver and is coupled to an auxiliary pull-down circuit that is only activated during the pull-down transition.
Abstract:
A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.
Abstract:
A display may have rows and columns of pixels that form an active area for displaying images. A display driver integrated circuit may provide multiplexed data signals to demultiplexer circuitry in the display. The demultiplexer circuitry may demultiplex the data signals and provide the demultiplexed data signals to the pixels on data lines. Gate lines may control the loading of the data signals into the pixels. The display may have a length dimension and a width dimension that is shorter than the length dimension. The data lines may extend parallel to the width dimension and the gate lines may extend parallel to the length dimension such that there are more data lines than gate lines in the display. A notch that is free of pixels may extend into the active area. Data lines extending parallel to the width dimension of the display may be routed around the notch.