公开(公告)号：US11139383B2

公开(公告)日：2021-10-05

申请号：US16849144

申请日：2020-04-15

Applicant: ASM IP Holding B.V.

Inventor： Suvi Haukka ,  Michael Givens ,  Eric Shero ,  Jerry Winkler ,  Petri Räisänen ,  Timo Asikainen ,  Chiyu Zhu ,  Jaakko Anttila

IPC: H01L29/49 ,  H01L21/285 ,  H01L21/3205 ,  C23C16/06 ,  C23C16/34 ,  C23C16/455 ,  H01L29/51

Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.

公开(公告)号：US20200343089A1

公开(公告)日：2020-10-29

申请号：US16787672

申请日：2020-02-11

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen

IPC: H01L21/02 ,  H01L21/283 ,  H01L21/311

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20200308710A1

公开(公告)日：2020-10-01

申请号：US16881885

申请日：2020-05-22

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US20200266096A1

公开(公告)日：2020-08-20

申请号：US16773064

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  C23C16/56 ,  C23C16/34 ,  C23C16/04 ,  C23C16/455 ,  C23C16/00 ,  H01L21/311 ,  H01L21/02 ,  H01L23/532

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10662534B2

公开(公告)日：2020-05-26

申请号：US16390540

申请日：2019-04-22

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US10566185B2

公开(公告)日：2020-02-18

申请号：US14819274

申请日：2015-08-05

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen

IPC: H01L21/02 ,  H01L21/283 ,  H01L21/311

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10553482B2

公开(公告)日：2020-02-04

申请号：US16158780

申请日：2018-10-12

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  C23C16/00

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20190287769A1

公开(公告)日：2019-09-19

申请号：US15923834

申请日：2018-03-16

Applicant: ASM IP Holding B.V.

Inventor： Tom Blomberg ,  Varun Sharma ,  Chiyu Zhu

IPC: H01J37/32 ,  H01L21/67 ,  H01L21/687

Abstract: A reactor for processing substrates and methods for manufacturing and using the reactor are disclosed. Specifically, the reactor can include a material that forms gas compounds. The gas compounds are then easily removed from the reactor, thus reducing or avoiding contamination of the substrates in the reactor that would otherwise arise.

公开(公告)号：US10283319B2

公开(公告)日：2019-05-07

申请号：US15835272

申请日：2017-12-07

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: H01J37/32 ,  C23F1/12 ,  H01L21/311 ,  C23G5/00

Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.

公开(公告)号：US20190103303A1

公开(公告)日：2019-04-04

申请号：US16158780

申请日：2018-10-12

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  C23C16/00 ,  H01L23/532

CPC classification number: H01L21/7685 ,  C23C16/00 ,  C23C16/04 ,  C23C16/34 ,  C23C16/45527 ,  C23C16/56 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/76834 ,  H01L21/76897 ,  H01L23/53266

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.