Abstract:
A device for use in a computer system, which provides compatibility for a proposed ISA plug and play (PNP) standard. The device is also backward compatible with non-PNP (legacy) PCs. Upon power-up, a device may initialize using default traditional or specification (ISA) values for I/O address, IRQ and DMA channels. If PNP activity by the host PC is detected by the device, the device is disabled, and awaits activation and I/O address, IRQ and DMA channel assignments from a host PC. If no PNP activity by a host PC is detected, the device continues to operate using default traditional or specification (ISA) I/O address, IRQ and DMA channels. The device of the present invention may be installed in PNP or legacy type PCs without reconfiguring hardware (e.g., DIP switches, jumpers or the like) in the device or installing new firmware, operating system, or applications software in a host PC.
Abstract:
A multimedia system includes an audio/video decompresser/decoder for decompressing/decoding a compressed/encoded audio/video data stream in order to generate video images for display on a display device and to generate audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder that has a novel memory controller and a novel method for displaying complete decoded/decompressed video frames on a display device without tearing. By use of selective storage of decoded/decompressed video frames in memory, tearing is prevented but information for predicting motion of a video segment is preserved.
Abstract:
A multimedia system including an integrated system (600) and video decoder (619) with an audio/video synchronization circuit (620) for substantially synchronizing the display of video images with audio playback. In addition, a step control is provided to allow for viewing of video images on a frame-by-frame basis or to freeze or play video in slow motion. When step control is activated, audio output is muted. Audio data corresponding to displayed video is transmitted to the muted audio decoder. An internal system clock (401) may be suppressed to the system clock counter (411). An external CPU (820) may provide system clock start times corresponding to video frames to be displayed. The external CPU (820) may increment the system clock counter (411) by an amount corresponding to the difference between a successive frame or number of frames.
Abstract:
A method and apparatus for automatic sector pulse generation and split field calculation in disk drives without the use of tables improves the seek latency of a disk drive system because it does not have to wait for the INDEX mark or the beginning of a frame, before beginning an operation it has been instructed to perform. The system can be designed to start from any point on the disk and begin calculations as if it were starting from the INDEX mark or the beginning of a frame. The calculations performed for each servo mark calculate the number of sectors and split fields which can be stored between servo marks on the disk. Multiple calculations can be performed between to servo marks. A counter is used to keep track of the number of servo marks for which the system has performed calculations. This counter is compared to the number of the last previously detected servo mark. The system continues to perform the calculations for each servo mark until the counter is equal to the number of the previously passed servo mark. At this point the system is synchronized and can perform the operation that it was instructed to perform, either format, read or write. The system can also be instructed to wait for the INDEX mark or the beginning of the next frame if the system is not compatible with the fast forward method.
Abstract:
A burst error correction system which comprises a CRC generator/checker (20); a syndrome/ECC generator (30) and an error corrector (40). Using codeword data, the CRC generator/checker (20) generates m number of CRC bytes. The CRC bytes are shifted out to the syndrome/ECC generator (30) for use in the generation of a plurality of ECC bytes. The ECC bytes are generated so that the sum of the bytes in each interleave for a codeword is zero, and that the ECC bytes generated by the syndrome/ECC generator (30) constitutes at least L number of consecutive roots of the codeword.
Abstract:
A hardware implementation of an error correcting encoder/decoder for polynomial codes which uses a single circuit to generate check symbols during the transmit operation and generate syndromes during a receive operation is disclosed. The selection of roots for the code generator and hence the code order is programmable.
Abstract:
A semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. (The erase cycle is understood to include, fully programming the block to be erased, and then erasing the block.) Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as hard disk would. Periodically, the mass storage will need to be cleaned up. Secondly, means are provided for evenly using all blocks in the mass storage. These advantages are achieved through the use of several flags, a map (108) to correlate a logical address (308) of a block to a physical address (408) of that block and a count register for each block. In particular, flags (118, 112, 116) are provided for defective blocks, used blocks, old version of a block, and a count to determine the number of times a block has been erased and written and erase inhibit flag.
Abstract:
Disclosed is a pulse detector (312) that uses four samples (406, 408, 410, 412, 504, 506, 508, 510) of an analog signal to detect a pulse as soon as one sample beyond the time of the peak of signal level at the pulse. The pulse detector can detect pulses by sampling at the center of a peak of the pulse or by sampling at either side of the peak of the pulse. The pulse detector detects pulses while tracking data, and it uses an alternate detection system for detecting pulses while acquiring timing and gain lock on a signal having a known data pattern. The detector uses either the sampled signal levels directly, or a moving average of two samples to perform the detection.
Abstract:
A process for producing a wide range of colors in images that are presented in successive frames on image fields (13) on color opto-electronic display means having separate illumination elements each of a different color at each pixel location. Each pixel location, for example, may have a red, a green and a blue illumination element. The display is divided into uniformly-sized display neighborhoods (17). The process includes, for a given pixel location (a-p) within any one of the uniformly-sized display neighborhoods, producing a given color at that pixel location by selecting a frame sequence for illuminating the illumination elements at the pixel location during presentation of an image wherein the number of times that any given illumination element at the pixel location is illuminated within a given frame sequence is controlled to create an appearance of color shading of that pixel location relative to other pixel locations and wherein adjacent pixel locations that have the same color within any one of the display neighborhoods have their illumination elements illuminated with different frame sequences to minimize display noise.
Abstract:
A computer system comprises a plurality of user computers interconnected through a public-switched telephone network and trunk lines, and also includes a plurality of Remote Data Processing Nodes (RDPNs) similarly connected to each other and to the user computers. A BBS station which is also coupled to the network receives test data from the user computers. Each user computer includes a test unit that includes a digital signal processor and an active control unit. The test unit has a dialing directory for connecting to various BBSs to test out the communication through a modem and the telephone network. Using the dialing directory, the test unit activates the modem to make a predetermined call through the telephone network to several of the RDPNs. The test unit collects survey, snapshot and real-time data packets in a predetermined data file which are communicated to the BBS station for debugging the system and determining the performance of the system.