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公开(公告)号:US08955045B2
公开(公告)日:2015-02-10
申请号:US13630095
申请日:2012-09-28
Applicant: Intel Corporation
Inventor: Ned Smith , Keith Shippy , Tobias Kohlenberg , Manish Dave , Omer Ben-Shalom , Mubashir Mian
IPC: G06F21/00
CPC classification number: G06F21/45 , H04L12/1822 , H04L63/08 , H04L63/105 , H04L2463/082
Abstract: Systems and methods may provide for determining a composite false match rate for a plurality of authentication factors in a client device environment. Additionally, the composite false match rate can be mapped to a score, wherein an attestation message is generated based on the score. In one example, the score is associated with one or more of a standardized range and a standardized level.
Abstract translation: 系统和方法可以提供用于在客户端设备环境中确定多个认证因素的复合假匹配率。 另外,可以将复合假匹配率映射到分数,其中基于分数生成认证消息。 在一个示例中,分数与标准化范围和标准化水平中的一个或多个相关联。
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公开(公告)号:US08904186B2
公开(公告)日:2014-12-02
申请号:US13629895
申请日:2012-09-28
Applicant: Intel Corporation
Inventor: Ned Smith , Victoria Moore
CPC classification number: G06F21/34 , G06F21/35 , G06F2221/2113 , H04L2463/082 , H04W12/06
Abstract: Systems and methods may implement a multi-factor authentication process utilizing, among other things, a value known by a user and an item in the user's possession. In one example, the method may include authenticating a user via a first method utilizing input received from the user, authenticating the user via a second method utilizing a device associated with the user, and authenticating the user via a third method utilizing a security token.
Abstract translation: 系统和方法可以实现多因素认证过程,其利用用户所拥有的值和用户拥有的项目。 在一个示例中,该方法可以包括通过使用从用户接收的输入的第一方法来验证用户,通过使用与用户相关联的设备的第二方法来认证用户,以及通过使用安全令牌的第三种方式来认证用户。
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公开(公告)号:US08874916B2
公开(公告)日:2014-10-28
申请号:US13629887
申请日:2012-09-28
Applicant: Intel Corporation
Inventor: Ned Smith , Sharon Smith , Willard Wiseman
CPC classification number: G06F21/57 , H04L9/32 , H04L9/3265 , H04L9/3271
Abstract: Systems and methods may provide introducing a first root of trust on a platform to a second root of trust on the same platform. In one example, the method may include using an authenticated code module to transfer a first encryption key from a first root of trust on a platform to a second root of trust on the platform, receiving a challenge response from the first root of trust at the second root of trust, and using the first encryption key to verify the challenge response.
Abstract translation: 系统和方法可以提供将平台上的第一信任根引入同一平台上的第二信任根。 在一个示例中,该方法可以包括使用经认证的代码模块将第一加密密钥从平台上的第一信任根传递到平台上的第二信任根,在第一根信任根源处接收挑战响应 第二个信任根,并使用第一个加密密钥验证挑战响应。
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公开(公告)号:US20250150361A1
公开(公告)日:2025-05-08
申请号:US19019032
申请日:2025-01-13
Applicant: Intel Corporation
Inventor: Francesc Guim Bernat , Ned Smith , Kshitij Doshi , Alexander Bachmutsky , Suraj Prabhakaran
IPC: H04L41/5006 , H04L41/12 , H04L41/5019 , H04L67/1004 , H04L67/1021 , H04L67/1023
Abstract: Network apparatus, communicatively coupled to a provider of services, that includes gateway circuitry to receive application programming interface (API) request data from a computing device that indicates a requested service. The gateway circuitry is to (1) select, based upon the API request data, at least one of the services corresponding to the requested service, and (2) generate, based upon mapping of the API request data to the at least one of the services, corresponding request data specifically for use in invoking the at least one of the services. The gateway circuitry is to (1) generate the corresponding request data by performing at least one programmable transformation, (2) be used in association with at least one proxy-related operation, (3) register the services for use in association with service discovery, and (4) verify the API request data and an identity associated with the computing device.
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公开(公告)号:US12153722B2
公开(公告)日:2024-11-26
申请号:US17132748
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Sunil Cheruvu , Ria Cheruvu , Kshitij Doshi , Francesc Guim Bernat , Ned Smith , Anahit Tarkhanyan
Abstract: Methods, apparatus, systems, and articles of manufacture to protect proprietary functionality and/or other content in hardware and software are disclosed. An example computer apparatus includes; a first circuit including a first interface, the first circuit associated with a first domain; a second circuit including a second interface, the second circuit associated with a second domain; and a chip manager to generate a first authenticated interface for the first interface using a first token and to generate a second authenticated interface for the second interface using a second token to enable communication between the first authenticated interface and the second authenticated interface.
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公开(公告)号:US12120175B2
公开(公告)日:2024-10-15
申请号:US17688695
申请日:2022-03-07
Applicant: Intel Corporation
Inventor: Francesc Guim Bernat , Ned Smith , Thomas Willhalm , Karthik Kumar , Timothy Verrall
IPC: H04L67/1008 , H04L67/00 , H04L67/10 , H04L67/1021 , H04L67/59 , H04L67/61 , H04L67/63
CPC classification number: H04L67/1008 , H04L67/10 , H04L67/1021 , H04L67/34 , H04L67/59 , H04L67/61 , H04L67/63
Abstract: Technologies for providing selective offload of execution of an application to the edge include a device that includes circuitry to determine whether a section of an application to be executed by the device is available to be offloaded. Additionally, the circuitry is to determine one or more characteristics of an edge resource available to execute the section. Further, the circuitry is to determine, as a function of the one or more characteristics and a target performance objective associated with the section, whether to offload the section to the edge resource and offload, in response to a determination to offload the section, the section to the edge resource.
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公开(公告)号:US12112201B2
公开(公告)日:2024-10-08
申请号:US17568567
申请日:2022-01-04
Applicant: Intel Corporation
Inventor: Kshitij Doshi , Francesc Guim Bernat , Timothy Verrall , Ned Smith , Rajesh Gadiyar
IPC: H04L9/32 , G06F8/41 , G06F9/445 , G06F9/50 , G06F9/54 , G06F11/34 , G06F16/18 , G06F21/60 , H04L9/00 , H04L9/06 , H04L9/08 , H04L9/40 , H04L41/0893 , H04L41/0896 , H04L41/14 , H04L41/142 , H04L41/5009 , H04L41/5025 , H04L41/5051 , H04L43/08 , H04L47/70 , H04L67/1008 , H04L67/12 , H04L67/141 , G06F9/38 , G06F9/455 , G06F9/48 , G06F11/10 , G06F12/14 , G06F16/23 , G16Y40/10 , H04L67/10
CPC classification number: G06F9/5016 , G06F8/443 , G06F9/44594 , G06F9/505 , G06F9/5072 , G06F9/5077 , G06F9/544 , G06F11/3433 , G06F16/1865 , G06F21/602 , H04L9/008 , H04L9/0637 , H04L9/0822 , H04L9/0825 , H04L9/0866 , H04L41/0893 , H04L41/0896 , H04L41/142 , H04L41/145 , H04L41/5009 , H04L41/5025 , H04L41/5051 , H04L43/08 , H04L47/822 , H04L63/0407 , H04L63/0428 , H04L63/1408 , H04L63/20 , H04L67/1008 , H04L67/12 , H04L67/141 , G06F9/3836 , G06F9/45533 , G06F9/4881 , G06F9/5038 , G06F11/1004 , G06F12/1408 , G06F16/2322 , G06F2209/509 , G16Y40/10 , H04L9/3297 , H04L67/10
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to aggregate telemetry data in an edge environment. An example apparatus includes at least one processor, and memory including instructions that, when executed, cause the at least one processor to at least generate a composition for an edge service in the edge environment, the composition representative of a first interface to obtain the telemetry data, the telemetry data associated with resources of the edge service and including a performance metric, generate a resource object based on the performance metric, generate a telemetry object based on the performance metric, and generate a telemetry executable based on the composition, the composition including at least one of the resource object or the telemetry object, the telemetry executable to generate the telemetry data in response to the edge service executing a computing task distributed to the edge service based on the telemetry data.
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公开(公告)号:US12034597B2
公开(公告)日:2024-07-09
申请号:US17497692
申请日:2021-10-08
Applicant: Intel Corporation
Inventor: Francesc Guim Bernat , Kshitij Doshi , Ned Smith , Thijs Metsch
IPC: G06F9/46 , G06F1/20 , G06F9/48 , G06F9/50 , G06F9/54 , G06F11/30 , H04L9/06 , H04L9/32 , H04L41/084 , H04L41/0869 , H04L41/5054 , H04L47/78 , H04L49/00 , H04L67/10 , H04W4/08 , H04W12/04
CPC classification number: H04L41/0843 , G06F1/206 , G06F9/4881 , G06F9/505 , G06F9/5094 , G06F9/542 , G06F11/3006 , H04L9/0637 , H04L9/3213 , H04L9/3247 , H04L41/0869 , H04L41/5054 , H04L47/781 , H04L49/70 , H04L67/10 , H04W4/08 , H04W12/04 , G06F2209/5021
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control processing of telemetry data at an edge platform. An example apparatus includes an orchestrator interface to, responsive to an amount of resources allocated to an orchestrator to orchestrate a workload at the edge platform meeting a first threshold, transmit telemetry data associated with the orchestrator to a computer to obtain a first orchestration result at a first granularity; a resource management controller to determine a second orchestration result at a second granularity to orchestrate the workload at the edge platform, the second granularity finer than the first granularity; and a scheduler to schedule a workload assigned to the edge platform based on the second orchestration result.
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公开(公告)号:US20240193284A1
公开(公告)日:2024-06-13
申请号:US18080635
申请日:2022-12-13
Applicant: Intel Corporation
Inventor: Francesc Guim Bernat , Marcos Carranza , Kshitij Doshi , Ned Smith , Karthik Kumar
IPC: G06F21/60
CPC classification number: G06F21/604
Abstract: Techniques and mechanisms to allocate functionality of a chiplet for access by one or more processor cores which are coupled to remote processor via a network switch. In an embodiment, a composite chip communicates with the switch via a Compute Express Link (CXL) link. The switch receives capability information which identifies both a chiplet of the composite chip, and a functionality which is available from a resource of that chiplet. Based on the capability information, the switch provides an inventory of chiplet resources. In response to an allocation request, the switch accesses the inventory to identify whether a suitable chiplet resource is available. Based on the access, the switch configures a chip to enable an allocation of a chiplet resource. In another embodiment, the chiplet resource is allocated at a sub-processor level of granularity, and disables access to the chiplet resource by one or more local processor cores.
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公开(公告)号:US20240114029A1
公开(公告)日:2024-04-04
申请号:US18538973
申请日:2023-12-13
Applicant: Intel Corporation
Inventor: Christopher Son Thach , Nathan John Heldt-Sheller , Radoslaw Benedykt Szulim , Ned Smith , Matthew David Balvin , Callum Wilson Noble , Anand Basalingappa Jyoti
IPC: H04L9/40
CPC classification number: H04L63/10
Abstract: Methods and apparatus for identity and access management on networked machines are disclosed herein. An example non-transitory machine readable storage medium includes instructions to cause programmable circuitry to at least grant first permission to form a connection between a remote compute device and a local compute device based on a first identity of a first account, the connection to enable the first account to operate the local compute device by impersonating a second user, the second user associated with a second identity, access a request to execute a command on the remote compute device from the first account, and determine, based on the first identity of the first account and the second identity of the second user, whether second permission is to be granted to execute the command.
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