公开(公告)号：US10863183B2

公开(公告)日：2020-12-08

申请号：US16455540

申请日：2019-06-27

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Arthur Jeremy Runyan

IPC: H04N19/00 ,  H04N19/172 ,  H04N19/176 ,  H04N19/119 ,  H04N19/182

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to identify a frame in a video stream, process a pixel row in the frame using a display engine to create blended and/or composited pixels, determine a coding unit (CU) row in the frame an encoder is encoding, determine if a distance between the pixel row in the frame and the CU row in the frame satisfies a threshold, and store the blended and/or composited pixels from the display engine in a cache if the threshold is satisfied or store the blended and/or composited pixels in memory if the threshold is not satisfied.

公开(公告)号：US20200314447A1

公开(公告)日：2020-10-01

申请号：US16651641

申请日：2017-12-29

Applicant: INTEL CORPORATION

Inventor： Srinivas Embar Raghukrishnan ,  James M. Holland ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Dmitry E. Ryzhov ,  Jason Tanner ,  Lidong Xu ,  Wenhao Zhang

IPC: H04N19/577 ,  H04N19/567 ,  H04N19/513

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine a residual error based on coding unit information, and determine a candidate coding unit and an associated rate distortion cost based on the residual error. An embodiment may additionally or alternatively include technology to partition a first coding unit into two or more smaller coding units based on a partition message, accelerate processing of at least one of the two or more smaller coding units, and estimate motion fora frame based at least partially on results of the accelerated processing. Other embodiments are disclosed and claimed.

公开(公告)号：US20200304710A1

公开(公告)日：2020-09-24

申请号：US16808626

申请日：2020-03-04

Applicant: Intel Corporation

Inventor： Jill M. Boyce ,  Stanley J. Baran ,  Sumit Mohan ,  Yi-Jen Chiu ,  Jason Tanner ,  Atthar H. Mohammed ,  Richmond Hicks ,  Barnan Das

IPC: H04N5/232 ,  H04N5/247 ,  H04N7/18 ,  H04N21/6587 ,  H04N21/84 ,  H04N21/4728 ,  H04N21/218 ,  H04N21/81 ,  H04L29/06

Abstract: Systems, apparatuses and methods may determine, on a per camera basis, an interest level with respect to panoramic video content, identify a subset of cameras in a plurality of cameras for which the interest level is below a threshold, and reduce power consumption in the subset of cameras. Additionally, technology may determine a projection format associated with panoramic video content, identify one or more discontinuous boundaries in the projection format, and modify an encoding scheme associated with the panoramic video content based on the discontinuous boundaries. Moreover, an encoded frame may be assigned to a temporal scalability layer that has a higher priority than a layer to which an asynchronous space warp frame is assigned. Additionally, technology may reduce the encoding complexity of a boundary between an active region and an inactive region in fisheye content.

公开(公告)号：US20200099926A1

公开(公告)日：2020-03-26

申请号：US16699243

申请日：2019-11-29

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Zhijun Lei

IPC: H04N19/105 ,  H04N19/119 ,  H04N19/426 ,  H04N19/142 ,  H04N19/176

Abstract: Methods, articles, and systems of video coding use intra block copying with hash-based searches.

公开(公告)号：US10528114B2

公开(公告)日：2020-01-07

申请号：US15148115

申请日：2016-05-06

Applicant: Intel Corporation

Inventor： Marc Beuchat ,  Jason Tanner

IPC: G06F1/32 ,  G06T1/20 ,  G06F1/324 ,  G06F1/3228

Abstract: One embodiment provides an apparatus. The apparatus includes a graphics processor and power management logic. The graphics processor includes display engine logic and encoder logic. The power management logic is to adjust an operating frequency of the encoder logic based, at least in part, on an encode time duration and based, at least in part, on a frame period.

公开(公告)号：US20190320185A1

公开(公告)日：2019-10-17

申请号：US16455540

申请日：2019-06-27

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Arthur Jeremy Runyan

IPC: H04N19/172 ,  H04N19/182 ,  H04N19/119 ,  H04N19/176

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to identify a frame in a video stream, process a pixel row in the frame using a display engine to create blended and/or composited pixels, determine a coding unit (CU) row in the frame an encoder is encoding, determine if a distance between the pixel row in the frame and the CU row in the frame satisfies a threshold, and store the blended and/or composited pixels from the display engine in a cache if the threshold is satisfied or store the blended and/or composited pixels in memory if the threshold is not satisfied.

公开(公告)号：US10356439B2

公开(公告)日：2019-07-16

申请号：US15637719

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Paul S. Diefenbaugh

IPC: H04N19/103 ,  H04N19/573 ,  H04N19/577 ,  H04N19/172

Abstract: Flexible frame referencing is described that is suitable for use with a display transport. In one example, the referencing is a method that includes receiving frames at a computer system for transmission to a display, sending frames to the display without inter-frame compression in an intra-frame mode, saving the sent frames to a reference frame list, switching the computer system to an inter-frame mode, selecting a reference frame from the reference frame list, compressing additional received frames using the selected reference frame, and sending the additional frames to the display compressed in the inter-frame mode.

公开(公告)号：US20190200039A1

公开(公告)日：2019-06-27

申请号：US16292808

申请日：2019-03-05

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Srinivasan Embar Raghukrishnan ,  James Holland

IPC: H04N19/567 ,  H04N19/159 ,  H04N19/105 ,  H04N19/46 ,  H04N19/176

CPC classification number: H04N19/567 ,  H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46

Abstract: An embodiment of a motion estimator apparatus may include technology to receive a compound message, and perform rate distortion estimation and check refinement for two or more coding unit descriptions for a source block based on the received compound message. Other embodiments are disclosed and claimed.

公开(公告)号：US10304421B2

公开(公告)日：2019-05-28

申请号：US15482535

申请日：2017-04-07

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Jason Tanner ,  Joydeep Ray ,  Altug Koker ,  Abhishek R. Appu ,  Pattabhiraman K

IPC: G09G5/395 ,  G06F3/14 ,  G09G3/00 ,  G09G5/36 ,  G06F9/451 ,  H04N19/42 ,  G06F9/455 ,  G06T1/20 ,  G06T1/60 ,  G06T9/00 ,  G06T15/00

Abstract: An apparatus and method are described for efficiently rendering an transmitting to a remote display. For example, one embodiment of a remote display apparatus comprises: a display engine to render a sequence of video images; an encoder to compress the sequence of video images to generate a sequence of compressed video images; a network interface controller to transmit the compressed video images over a network link to a remote display; a plurality of buffer pointer registers to store read pointers and write pointers identifying read locations and write locations, respectively, in a frame buffer and a compressed stream buffer; a central processing unit (CPU) to initialize the read pointers and write pointers for processing one or more of the video images; and the display engine to access a first write pointer to write to a specified location in the frame buffer, the encoder to begin reading from the frame buffer based on a first read pointer value, the encoder to write to the compressed stream buffer based on a second write pointer value, and the network interface controller to read from the compressed stream buffer based on a second read pointer value, the first and second write and read pointer values to be updated without intervention from the CPU as the display engine writes to the frame buffer, the encoder reads from the frame buffer and writes to the compressed stream buffer, and the network interface controller reads from the compressed stream buffer.

公开(公告)号：US20190014326A1

公开(公告)日：2019-01-10

申请号：US15642773

申请日：2017-07-06

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Paul S. Diefenbaugh

IPC: H04N19/162 ,  H04N19/124 ,  H04N19/139 ,  H04N19/196 ,  H04N19/172

Abstract: A method for an IMU enhanced reference list management and encoding is described herein. The method includes obtaining a plurality of reference frames and updating the plurality of reference frames based on a position information and a motion information of a user. The method also includes encoding a current frame of a scene based on the plurality of reference frames and a spatial location of the current frame and transmitting the current frame after encoding to be rendered.